- 16 Oct, 2021 2 commits
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Mahesh Sivasubramanian authored
Add device binding documentation for Qualcomm Technologies, Inc. (QTI) Sleep stats driver. The driver is used for displaying Sleep statistic maintained by Always On Processor or Resource Power Manager. Cc: devicetree@vger.kernel.org Signed-off-by:
Mahesh Sivasubramanian <msivasub@codeaurora.org> Signed-off-by:
Lina Iyer <ilina@codeaurora.org> Signed-off-by:
Maulik Shah <mkshah@codeaurora.org> Reviewed-by:
Rob Herring <robh@kernel.org> Reviewed-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by:
Stephen Boyd <swboyd@chromium.org> Tested-by:
Shawn Guo <shawn.guo@linaro.org> Signed-off-by:
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Dmitry Baryshkov authored
Add IDs for PMK8001 and PMI8996. They also fall in the list of 'duplicated' IDs, where the same index was used for multiple chips. Fixes: 7fda2b0b ("soc: qcom: socinfo: import PMIC IDs from pmic-spmi") Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
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- 15 Oct, 2021 4 commits
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Bjorn Andersson authored
The general expectation is that powering on a power-domain should make the power domain deliver some power, and if a specific performance state is needed further requests has to be made. But in contrast with other power-domain implementations (e.g. rpmpd) the RPMh does not have an interface to enable the power, so the driver has to vote for a particular corner (performance level) in rpmh_power_on(). But the corner is never initialized, so a typical request to simply enable the power domain would not actually turn on the hardware. Further more, when no more clients vote for a performance state (i.e. the aggregated vote is 0) the power domain would be turned off. Fix both of these issues by always voting for a corner with non-zero value, when the power domain is enabled. The tracking of the lowest non-zero corner is performed to handle the corner case if there's ever a domain with a non-zero lowest corner, in which case both rpmh_power_on() and rpmh_rpmhpd_set_performance_state() would be allowed to use this lowest corner. Fixes: 279b7e8a ("soc: qcom: rpmhpd: Add RPMh power domain driver") Signed-off-by:
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Bjorn Andersson authored
Practically all modern Qualcomm platforms has a single reserved-memory region for SMEM. So rather than having to describe SMEM in the form of a node with a reference to a reserved-memory node, allow the SMEM device to be instantiated directly from the reserved-memory node. The current means of falling back to dereferencing the "memory-region" is kept as a fallback, if it's determined that the SMEM node is a reserved-memory node. The "qcom,smem" compatible is added to the reserved_mem_matches list, to allow the reserved-memory device to be probed. In order to retain the readability of the code, the resolution of resources is split from the actual ioremapping. Signed-off-by:
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Link: https://lore.kernel.org/r/20210930182111.57353-4-bjorn.andersson@linaro.org
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Bjorn Andersson authored
In the olden days the Qualcomm shared memory (SMEM) region consisted of multiple chunks of memory, so SMEM was described as a standalone node with references to its various memory regions. But practically all modern Qualcomm platforms has a single reserved memory region used for SMEM. So rather than having to use two nodes to describe the one SMEM region, update the binding to allow the reserved-memory region alone to describe SMEM. The olden format is preserved as valid, as this is widely used already. Signed-off-by:
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Bjorn Andersson authored
The Qualcomm SMEM binding always depended on a reference to a SRAM node of compatible "qcom,rpm-msg-ram", document this as part of the SRAM binding. The SRAM is consumed as a whole and not split up using subnodes, so properties related to this are not required. Signed-off-by:
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- 28 Sep, 2021 6 commits
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Bjorn Andersson authored
v5.15-rc1 + 20210927135559.738-[23456]-srinivas.kandagatla@linaro.org This immutable branch is based on v5.15-rc1 and contains the following patches extending the existig APR driver to also implement GPR: 20210927135559.738-2-srinivas.kandagatla@linaro.org 20210927135559.738-3-srinivas.kandagatla@linaro.org 20210927135559.738-4-srinivas.kandagatla@linaro.org 20210927135559.738-5-srinivas.kandagatla@linaro.org 20210927135559.738-6-srinivas.kandagatla@linaro.org
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Srinivas Kandagatla authored
Qualcomm Generic Packet router aka GPR is the IPC mechanism found in AudioReach next generation signal processing framework to perform command and response messages between various processors. GPR has concepts of static and dynamic port, all static services like APM (Audio Processing Manager), PRM (Proxy resource manager) have fixed port numbers where as dynamic services like graphs have dynamic port numbers which are allocated at runtime. All GPR packet messages will have source and destination domain and port along with opcode and payload. Signed-off-by:
Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by:
Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by:
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Srinivas Kandagatla authored
Qualcomm Generic Packet router aka GPR is the IPC mechanism found in AudioReach next generation signal processing framework to perform command and response messages between various processors. GPR has concepts of static and dynamic port, all static services like APM (Audio Processing Manager), PRM (Proxy resource manager) have fixed port numbers where as dynamic services like graphs have dynamic port numbers which are allocated at runtime. All GPR packet messages will have source and destination domain and port along with opcode and payload. This support is added using existing APR driver to reuse most of the code. Signed-off-by:
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Srinivas Kandagatla authored
APR and other packet routers like GPR are pretty much same and interact with other drivers in similar way. Ex: GPR ports can be considered as APR services, only difference is they are allocated dynamically. Other difference is packet layout, which should not matter with the apis abstracted. Apart from this the rest of the functionality is pretty much identical across APR and GPR. Make the apr code more reusable by abstracting it service level, rather than device level so that we do not need to write new drivers for other new packet routers like GPR. This patch is in preparation to add GPR support to this driver. Signed-off-by:
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Srinivas Kandagatla authored
replace usage of qcom,apr-domain property with qcom,domain property so that bindings and driver can be reused. Signed-off-by:
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Srinivas Kandagatla authored
Convert APR bindings to yaml format so that we could add new bindings support. All the dsp services bindings are now part of apr bindings instead of adding them to audio bindings. Signed-off-by:
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- 27 Sep, 2021 4 commits
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Sibi Sankar authored
Delete unused power-domain definitions exposed by AOSS QMP. Signed-off-by:
Sibi Sankar <sibis@codeaurora.org> Reviewed-by:
Matthias Kaehlcke <mka@chromium.org> Signed-off-by:
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Sibi Sankar authored
Remove the unused aoss-qmp header from the list of includes. Signed-off-by:
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Sibi Sankar authored
Strip out the load state power-domain support from the driver since the low power mode signalling for the co-processors is now accessible through the direct qmp message send interface. Signed-off-by:
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Sibi Sankar authored
The power-domains exposed by AOSS QMP node are used to notify the Always on Subsystem (AOSS) that a particular co-processor is up/down. These co-processors enter low-power modes independent to that of the application processor and their states are expected to remain unaltered across system suspend/resume cycles. To achieve this behavior let's drop the load power-domain and replace them with generic qmp_send interface instead. Signed-off-by:
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- 23 Sep, 2021 1 commit
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Deepak Kumar Singh authored
Remote susbsystems notify fatal crash through smp2p interrupt. When remoteproc crashes it can cause soc to come out of low power state and may not allow again to enter in low power state until crash is handled. Mark smp2p interrupt wakeup capable so that interrupt handler is executed and remoteproc crash can be handled in system resume path. This patch marks interrupt wakeup capable but keeps wakeup disabled by default. User space can enable it based on its requirement for wakeup from suspend. Signed-off-by:
Deepak Kumar Singh <deesin@codeaurora.org> Reviewed-by:
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- 21 Sep, 2021 23 commits
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Bjorn Andersson authored
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Konrad Dybcio authored
Add compatible and constants for the power domains exposed by the RPMH in the Qualcomm SM6350 platform. Acked-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by:
Konrad Dybcio <konrad.dybcio@somainline.org> Acked-by:
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Konrad Dybcio authored
Add SM6350 AOSS QMP compatible to the list of possible bindings. Signed-off-by:
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Naina Mehta authored
Disable MMUHWT retention for SC7280 as done for other platforms to avoid more power burn. Fixes: f6a07be6 ("soc: qcom: llcc: Add configuration data for SC7280") Signed-off-by:
Naina Mehta <nainmeht@codeaurora.org> Signed-off-by:
Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Signed-off-by:
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Shawn Guo authored
Add compatible for QCM2290 SoC support. Signed-off-by:
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Shawn Guo authored
Add compatible for the RPM on Qualcomm QCM2290 SoC. Signed-off-by:
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Vladimir Lypak authored
Add compatible for SCM on MSM8953. Signed-off-by:
Vladimir Lypak <junak.pub@gmail.com> Signed-off-by:
Sireesh Kodali <sireeshkodali@protonmail.com> Signed-off-by:
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Vladimir Lypak authored
SCM driver on MSM8953 requires 3 clocks. Signed-off-by:
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Len Baker authored
strcpy() performs no bounds checking on the destination buffer. This could result in linear overflows beyond the end of the buffer, leading to all kinds of misbehaviors. The safe replacement is strscpy(). This is a previous step in the path to remove the strcpy() function entirely from the kernel. Signed-off-by:
Len Baker <len.baker@gmx.com> Signed-off-by:
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Cai Huoqing authored
Use the devm_platform_ioremap_resource_byname() helper instead of calling platform_get_resource_byname() and devm_ioremap_resource() separately Signed-off-by:
Cai Huoqing <caihuoqing@baidu.com> Signed-off-by:
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Cai Huoqing authored
Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately Signed-off-by:
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Cai Huoqing authored
Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately Signed-off-by:
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Cai Huoqing authored
Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately Signed-off-by:
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Cai Huoqing authored
Use the devm_platform_ioremap_resource_byname() helper instead of calling platform_get_resource_byname() and devm_ioremap_resource() separately Signed-off-by:
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Cai Huoqing authored
Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately Signed-off-by:
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Robert Marko authored
IPQ8074 family SoC ID-s are missing, so lets add them based on the downstream driver. Signed-off-by:
Robert Marko <robimarko@gmail.com> Reviewed-by:
Kathiravan T <kathirav@codeaurora.org> Signed-off-by:
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Vladimir Lypak authored
Add support for MSM8953 power domains. Signed-off-by:
Vladimir Lypak <vladimir.lypak@gmail.com> Signed-off-by:
Adam Skladowski <a_skl39@protonmail.com> Signed-off-by:
Sireesh Kodali <sireeshkodali1@gmail.com> Signed-off-by:
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Vladimir Lypak authored
Add compatible and constants for the power domains exposed by the RPM in the Qualcomm MSM8953 platform. Signed-off-by:
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Vladimir Lypak authored
Add a compatible for MSM8953 Signed-off-by:
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Vladimir Lypak authored
Document compatible for MSM8953 SoC. Signed-off-by:
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AngeloGioacchino Del Regno authored
The driver was updated to add SAW2 v4.1 support for new SoCs: document the new compatibles. Signed-off-by:
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AngeloGioacchino Del Regno authored
Add the SAWv4.1 parameters for MSM8998's Gold and Silver clusters. Signed-off-by:
Stephan Gerhold <stephan@gerhold.net> Signed-off-by:
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AngeloGioacchino Del Regno authored
Implement the support for SAW v4.1, used in at least MSM8998, SDM630, SDM660 and APQ variants and, while at it, also add the configuration for the SDM630/660 Silver and Gold cluster L2 Adaptive Voltage Scaler: this is also one of the prerequisites to allow the OSM controller to perform DCVS. Please note that despite there are various "versions" of these values downstream, these are the only ones that are perfectly stable on the entire set of tested devices. Signed-off-by:
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