- 11 Dec, 2016 1 commit
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Simon Horman authored
In the case of Renesas R-Car hardware we know that there are generations of SoCs, e.g. Gen 2 and Gen 3. But beyond that it's not clear what the relationship between IP blocks might be. For example, I believe that r8a7790 is older than r8a7791 but that doesn't imply that the latter is a descendant of the former or vice versa. We can, however, by examining the documentation and behaviour of the hardware at run-time observe that the current driver implementation appears to be compatible with the IP blocks on SoCs within a given generation. For the above reasons and convenience when enabling new SoCs a per-generation fallback compatibility string scheme is being adopted for drivers for Renesas SoCs. Also: * Deprecate renesas,i2c-rcar. It seems poorly named as it is only compatible with R-Car Gen 1. It also appears unused in mainline. * Add some text to describe per-SoC bindings Signed-off-by:
Simon Horman <horms+renesas@verge.net.au> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by:
Wolfram Sang <wsa@the-dreams.de>
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- 01 Dec, 2016 6 commits
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Gao Pan authored
This patch adds lpi2c bus driver to support new i.MX products which use lpi2c instead of the old imx i2c. The lpi2c can continue operating in stop mode when an appropriate clock is available. It is also designed for low CPU overhead with DMA offloading of FIFO register accesses. Signed-off-by:
Gao Pan <pandy.gao@nxp.com> Reviewed-by:
Fugang Duan <B38611@freescale.com> Reviewed-by:
Vladimir Zapolskiy <vz@mleia.com> Signed-off-by:
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Gao Pan authored
Add a binding document for lpi2c driver. Signed-off-by:
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Alexander Stein authored
Both Merrifield TRM and Medfield TRM state: "Both 7-bit and 10-bit addressing modes are supported." Signed-off-by:
Alexander Stein <alexander.stein@systec-electronic.com> Acked-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by:
Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by:
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Romain Perier authored
The Armada 3700 has two I2C controllers that is compliant with the I2C Bus Specificiation 2.1, supports multi-master and different bus speed: Standard mode (up to 100 KHz), Fast mode (up to 400 KHz), High speed mode (up to 3.4 Mhz). This IP block has a lot of similarity with the PXA, except some register offsets and bitfield. This commits adds a basic support for this I2C unit. Signed-off-by:
Romain Perier <romain.perier@free-electrons.com> Tested-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by:
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Romain Perier authored
So far, the bit masks for the fast and high speed mode were statically defined. Some IP blocks might use different bits for these modes. This commit introduces new fields in order to enable the definition of different bit masks for these features. If these fields are undefined, ICR_FM and ICR_HS are selected to preserve backward compatibility with other IPs. Signed-off-by:
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Romain Perier authored
This commit documents the compatible string to have the compatibility for the I2C unit found in the Armada 3700. Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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- 29 Nov, 2016 5 commits
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Naveen Kaje authored
I2C QUP driver relies on SMBus emulation support from the framework. To handle SMBus block reads, the driver should check I2C_M_RECV_LEN flag and should read the first byte received as the message length. The driver configures the QUP hardware to read one byte. Once the message length is known from this byte, the QUP hardware is configured to read the rest. Signed-off-by:
Naveen Kaje <nkaje@codeaurora.org> Signed-off-by:
Austin Christ <austinwc@codeaurora.org> Reviewed-by:
Sricharan R <sricharan@codeaurora.org> Signed-off-by:
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Naveen Kaje authored
Add support to get the device parameters from ACPI. Assume that the clocks are managed by firmware. Signed-off-by:
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Alexander Stein authored
Use a common place for default functionality bits for both platform and pci driver. Signed-off-by:
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Peter Rosin authored
If the gpio controller supports it and the gpio lines are concentrated to one gpio chip, the mux controller pins will get updated simultaneously. Signed-off-by:
Peter Rosin <peda@axentia.se> Signed-off-by:
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tnhuynh@apm.com authored
This patch enables ACPI support for mux-pca954x driver. Signed-off-by:
Tin Huynh <tnhuynh@apm.com> Acked-by:
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- 24 Nov, 2016 7 commits
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Benjamin Tissoires authored
The current SMBus Host Notify implementation relies on .alert() to relay its notifications. However, the use cases where SMBus Host Notify is needed currently is to signal data ready on touchpads. This is closer to an IRQ than a custom API through .alert(). Given that the 2 touchpad manufacturers (Synaptics and Elan) that use SMBus Host Notify don't put any data in the SMBus payload, the concept actually matches one to one. Benefits are multiple: - simpler code and API: the client will just have an IRQ, and nothing needs to be added in the adapter beside internally enabling it. - no more specific workqueue, the threading is handled by IRQ core directly (when required) - no more races when removing the device (the drivers are already required to disable irq on remove) - simpler handling for drivers: use plain regular IRQs - no more dependency on i2c-smbus for i2c-i801 (and any other adapter) - the IRQ domain is created automatically when the adapter exports the Host Notify capability - the IRQ are assign only if ACPI, OF and the caller did not assign one already - the domain is automatically destroyed on remove - fewer lines of code (minus 20, yeah!) Signed-off-by:
Benjamin Tissoires <benjamin.tissoires@redhat.com> Signed-off-by:
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Benjamin Tissoires authored
On the platform tested, reading SMBNTFDDAT always returns 0 (using 1 read of a word or 2 of 2 bytes). Given that we are not sure why and that we don't need to rely on the data parameter in the current users of Host Notify, remove this part of the code. If someone wants to re-enable it, just revert this commit and data should be available. Signed-off-by:
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Benjamin Tissoires authored
no functional changes Signed-off-by:
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Benjamin Tissoires authored
i801 mixes hexadecimal and decimal values for defining bits. However, we have a nice BIT() macro for this exact purpose. No functional changes, cleanup only. Reviewed-by:
Jean Delvare <jdelvare@suse.de> Signed-off-by:
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Benjamin Tissoires authored
No functional changes, just typos and remove unused #define. Reviewed-by:
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Benjamin Tissoires authored
Also do not override any other configuration in this register. Signed-off-by:
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Vadim Pasternak authored
Device driver for Mellanox I2C controller logic, implemented in Lattice CPLD device. Device supports: - Master mode - One physical bus - Polling mode The Kconfig currently controlling compilation of this code is: drivers/i2c/busses/Kconfig:config I2C_MLXCPLD Signed-off-by:
Michael Shych <michaelsh@mellanox.com> Signed-off-by:
Vadim Pasternak <vadimp@mellanox.com> Reviewed-by:
Jiri Pirko <jiri@mellanox.com> Reviewed-by:
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- 18 Nov, 2016 7 commits
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Tanmay Jagdale authored
The ACPI companion of the adapter has to be set for I2C controller code to read and attach the slave devices described in the ACPI table with the I2CSerialBus resource descriptor. Used ACPI_COMPANION_SET macro to set this. Signed-off-by:
Tanmay Jagdale <tanmay.jagdale@broadcom.com> Signed-off-by:
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Masahiro Yamada authored
Documentation/CodingStyle recommends to use label names which say what the goto does or why the goto exists. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by:
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Masahiro Yamada authored
Documentation/CodingStyle recommends to use label names which say what the goto does or why the goto exists. Signed-off-by:
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Jarkko Nikula authored
Allow more flexibility to bus speed selection. Now if there are I2C slave connections defined in ACPI the speed of slowest device on the bus will define the bus speed. However if also "clock-frequency" device property is defined we should use the slowest of these two. This is targeted to maker boards where developer may want to connect slower I2C slave devices to the bus than defined in existing ACPI I2C slave connections. Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by:
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Tin Huynh authored
Free and Open IPMI use SMBUS BLOCK Read/Write to support SSIF protocol. However, I2C Designware Core Driver doesn't handle the case at the moment. The below patch supports this feature. Signed-off-by:
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Julia Lawall authored
Check for i2c_adapter_quirks structures that are only stored in the quirks field of an i2c_adapter structure. This field is declared const, so i2c_adapter_quirks structures that have this property can be declared as const also. Signed-off-by:
Julia Lawall <Julia.Lawall@lip6.fr> Acked-by: Ray Jui <ray.jui@broadcom.com> # for bcm-iproc Signed-off-by:
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Paul Gortmaker authored
The Kconfig currently controlling compilation of this code is: drivers/i2c/busses/Kconfig:config I2C_PXA_PCI drivers/i2c/busses/Kconfig: def_bool I2C_PXA && X86_32 && PCI && OF ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. We explicitly disallow a driver unbind, since that doesn't have a sensible use case anyway, and it allows us to drop the ".remove" code for non-modular drivers. Since module_pci_driver() uses the same init level priority as builtin_pci_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information was (or is now) contained at the top of the file in the comments. Signed-off-by:
Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by:
Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by:
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- 17 Nov, 2016 7 commits
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Vadim Pasternak authored
This driver allows I2C routing controlled through CPLD select registers on a wide range of Mellanox systems (CPLD Lattice device). MUX selection is provided by digital and analog HW. Analog part is not under SW control. Digital part is under CPLD control (channel selection/de-selection). Connectivity schema. .---. .-------------. | l | | |-- i2cx1 -- i2cx8 | i |-- i2cn --+--| mlxcpld mux | | n | | | |-- i2cy1 -- i2cy8 | u | | '-------------' | x | | | '---' '---------' i2c-mux-mlxpcld does not necessarily require i2c-mlxcpld. It can be used along with another bus driver, and still control i2c routing through CPLD mux selection, in case the system is equipped with CPLD capable of mux selection control. The Kconfig currently controlling compilation of this code is: drivers/i2c/muxes/Kconfig:config I2C_MUX_MLXCPLD Signed-off-by:
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Lee Jones authored
As part of an effort to rid the mostly unused second parameter for I2C related .probe() functions and to conform to other existing frameworks we're moving over to a temporary replacement .probe() call-back. Acked-by:
Grant Likely <grant.likely@linaro.org> Signed-off-by:
Lee Jones <lee.jones@linaro.org> Signed-off-by:
Kieran Bingham <kieran@bingham.xyz> Reviewed-by:
Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by:
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Lee Jones authored
This will aid the seamless removal of the current probe()'s, more commonly unused than used second parameter. Most I2C drivers can simply switch over to the new interface, others which have DT support can use its own matching instead and others can call i2c_match_id() themselves. This brings I2C's device probe method into line with other similar interfaces in the kernel and prevents the requirement to pass an i2c_device_id table. Suggested-by:
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Lee Jones authored
When there was no other way to match a I2C device to driver i2c_match_id() was exclusively used. However, now there are other types of tables which are commonly supplied, matching on an i2c_device_id table is used less frequently. Instead of _always_ calling i2c_match_id() from within the framework, we only need to do so from drivers which have no other way of matching. This patch makes i2c_match_id() available to the aforementioned device drivers. Acked-by:
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Lee Jones authored
Currently the I2C framework insists on devices supplying an I2C ID table. Many of the devices which do so unnecessarily adding quite a few wasted lines to kernel code. This patch allows drivers a means to 'not' supply the aforementioned table and match on DT match tables instead. Acked-by:
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Lee Jones authored
This function provides a single call for all I2C devices which need to match firstly using traditional OF means i.e by of_node, then if that fails we attempt to match using the supplied I2C client name with a list of supplied compatible strings with the '<vendor>,' string removed. The latter is required due to the unruly naming conventions used currently by I2C devices. Acked-by:
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Lee Jones authored
A great deal of I2C devices are currently matched via DT node name, and as such the compatible naming convention of '<vendor>,<device>' has gone somewhat awry - some nodes don't supply one, some supply an arbitrary string and others the correct device name with an arbitrary vendor prefix. In an effort to correct this problem we have to supply a mechanism to match a device by compatible string AND by simple device name. This function strips off the '<vendor>,' part of a supplied compatible string and attempts to match without it. It is also used for sysfs, where a user can choose to instantiate a device on an i2c bus using the sysfs interface by providing a string and address to match and communicate with the device on the bus. Presently this string is only matched against the old i2c device id style strings, even in the presence of full device tree compatible strings with vendor prefixes. Providing a vendor-prefixed string to the sysfs interface will not match against the device tree of_match_device() calls as there is no device tree node to parse from the sysfs interface. This function can match both vendor prefixed and stripped compatible strings on the sysfs interface. Acked-by:
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- 13 Nov, 2016 1 commit
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Lee Jones authored
Here we're providing dereference protection for i2c_match_id(), which saves us having to do it each time it's called. We're also stripping out the (now) needless checks in i2c_device_match(). This patch paves the way for other, similar code trimming. Acked-by:
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- 07 Nov, 2016 6 commits
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Noralf Trønnes authored
Support a dynamic clock by reading the frequency and setting the divisor in the transfer function instead of during probe. Signed-off-by:
Noralf Trønnes <noralf@tronnes.org> Reviewed-by:
Martin Sperl <kernel@martin.sperl.org> Signed-off-by:
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Noralf Trønnes authored
Use i2c_adapter->timeout for the completion timeout value. The core default is 1 second. Signed-off-by:
Eric Anholt <eric@anholt.net> Signed-off-by:
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Noralf Trønnes authored
Documentation/i2c/i2c-protocol states that Combined transactions should separate messages with a Start bit and end the whole transaction with a Stop bit. This patch adds support for issuing only a Start between messages instead of a Stop followed by a Start. This implementation differs from downstream i2c-bcm2708 in 2 respects: - it uses an interrupt to detect that the transfer is active instead of using polling. There is no interrupt for Transfer Active, but by not prefilling the FIFO it's possible to use the TXW interrupt. - when resetting/disabling the controller between transfers it writes CLEAR to the control register instead of just zero. Using just zero gave many errors. This might be the reason why downstream had to disable this feature and make it available with a module parameter. I have run thousands of transfers to a DS1307 (rtc), MMA8451 (accel) and AT24C32 (eeprom) in parallel without problems. Signed-off-by:
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Noralf Trønnes authored
The controller can't support this flag, so remove it. Documentation/i2c/i2c-protocol states that all of the message is sent: I2C_M_IGNORE_NAK: Normally message is interrupted immediately if there is [NA] from the client. Setting this flag treats any [NA] as [A], and all of message is sent. >From the BCM2835 ARM Peripherals datasheet: The ERR field is set when the slave fails to acknowledge either its address or a data byte written to it. So when the controller doesn't receive an ack, it sets ERR and raises an interrupt. In other words, the whole message is not sent. Signed-off-by: -
Noralf Trønnes authored
Writing to an AT24C32 generates on average 2x i2c transfer errors per 32-byte page write. Which amounts to a lot for a 4k write. This is due to the fact that the chip doesn't respond during it's internal write cycle when the at24 driver tries and retries the next write. Only a handful drivers use dev_err() on transfer error, so switch to dev_dbg() instead. Signed-off-by:
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Noralf Trønnes authored
If an unexpected TXW or RXR interrupt occurs (msg_buf_remaining == 0), the driver has no way to fill/drain the FIFO to stop the interrupts. In this case the controller has to be disabled and the transfer completed to avoid hang. (CLKT | ERR) and DONE interrupts are completed in their own paths, and the controller is disabled in the transfer function after completion. Unite the code paths and do disabling inside the interrupt routine. Clear interrupt status bits in the united completion path instead of trying to do it on every interrupt which isn't necessary. Only CLKT, ERR and DONE can be cleared that way. Add the status value to the error value in case of TXW/RXR errors to distinguish them from the other S_LEN error. Signed-off-by:
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