- 18 Mar, 2011 3 commits
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Murthy, Raghuveer authored
Adding DVI support to OMAP4 PandaBoard. PandaBoard uses TFP410 DVI Framer chip http://focus.ti.com/lit/ds/symlink/tfp410.pdf The TFP410 gets its power enable and display data over GPIO lines muxed in from OMAP4430. PandaBoard supports other LCD displays through expansion connectors, following board rework. This will disable the DVI interface. However, the existing mux settings remain the same PandaBoard additionally supports display over HDMI interface. It is mutually exclusive to display over DVI. Hence the mux settings need to be configured seperately, as and when HDMI is enabled Also, I2C3 bus used for reading EDID data from DVI Monitors is registered here. Since the design is similar to BeagleBoard, the code for the same is taken from the kernel.org commit e3333f48 (omap: Adding beagle i2c eeprom driver to read EDID) Reviewed-by:
Manjunath G Kondaiah <manjugk@ti.com> Reviewed-by:
Anand Gadiyar <gadiyar@ti.com> Reviewed-by:
Nishanth Menon <nm@ti.com> Reviewed-by:
Sumit Semwal <sumit.semwal@ti.com> Signed-off-by:
Raghuveer Murthy <raghuveer.murthy@ti.com> [tomi.valkeinen@ti.com: fixed conflicts with HDMI] Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com>
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Murthy, Raghuveer authored
Add dss.dpll4_m4_ck (DSS FCLK) initialization for OMAP4. This is used to compute the pixel clock for DPI interface and also to reconfigure the DSS FCLK to the desired rate, corresponding to the rate computed for pixel clock. Adding these cpu_is_44xx() checks are meant to be temporary, until a cleaner implementation to manage these checks are added. Currently this is needed to get DVI display running on OMAP4 PandaBoard Signed-off-by:
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Tomi Valkeinen authored
OMAP2 does not have dpll4_m4_ck source clock for dss functional clock, but later OMAPs do. Currently we check for cpu type in multiple places to find out if dpll4_m4_ck is available. This patch cleans up dss.c by using the fact that dss.dpll4_m4_ck pointer is NULL on OMAP2. This allows us to remove many of the cpu checks. Signed-off-by:
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- 16 Mar, 2011 10 commits
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K, Mythri P authored
Adding board file structure for display which adds the display structure with HDMI as the default driver when the display init is called. HDMI GPIO configurations are also done in this file. Signed-off-by:
Mythri P K <mythripk@ti.com> Signed-off-by:
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Mythri P K authored
Adding board file structure for display which adds the display structure with HDMI as the default driver when the display init is called. HDMI GPIO configurations are also done in this file. Signed-off-by:
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Mythri P K authored
calling the platform registration of HDMI driver from core during initialization. Signed-off-by:
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Mythri P K authored
Adding kconfig and makefile changes to add support for HDMI in OMAP4. Signed-off-by:
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Mythri P K authored
The panel driver(hdmi_omap4_panel.c) in omap2/dss acts as a controller to manage the enable and disable requests and synchronize audio and video. Signed-off-by:
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Mythri P K authored
Adding the hdmi interface driver(hdmi.c) to the dss driver. It configures the audio and video portion of HDMI based on functionality called by the panel driver. Signed-off-by:
Yong Zhi <y-zhi@ti.com> Signed-off-by:
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Mythri P K authored
Adding the hdmi interface driver header file (hdmi.h) to the dss driver. Register and structure declaration done here. Signed-off-by:
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Mythri P K authored
Adding function to reset/set gamma table bit for TV interface, currently only support for disabled is added. Signed-off-by:
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Mythri P K authored
Adding function to select between HDMI or VENC clock source. Signed-off-by:
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Mythri P K authored
Adding display type HDMI in dss_features, overlay and the manager so that HDMI type of display will be recognized. Signed-off-by:
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- 15 Mar, 2011 9 commits
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Tomi Valkeinen authored
print_irq_status functions can be called with empty irq status when full irq debugging is enabled. This patch makes print_irq_status functions return immediately when given an empty irq status to lessen the debug spam slightly. Signed-off-by: -
Tomi Valkeinen authored
dsi_vc_send_bta_sync() waits for BTA interrupt with a 500ms timeout. If a DSI error happens, no BTA is received and the timeout triggers. This could be handled much faster by listening to DSI errors also. This patch uses the ISR support to notice DSI errors while waiting for the BTA, thus speeding up the fail-path considerably. Signed-off-by: -
Tomi Valkeinen authored
Remove bta_callback from the interrupt handler, and use ISR support instead. Signed-off-by: -
Tomi Valkeinen authored
Remove bta_completion handling from the interrupt handler, and use ISR support instead. Signed-off-by: -
Tomi Valkeinen authored
Add generic ISR support for DSI interrupts. ISRs can be used instead of custom hooks in the interrupt handler. Signed-off-by: -
Tomi Valkeinen authored
Clean up the IRQ handler a bit by separating collection of IRQ stats and handling of IRQ errors to separate functions. Signed-off-by: -
Taneja, Archit authored
The DSI PLL parameters (regm, regn, regm_dispc, regm_dsi, fint) have different fields and also different Max values on OMAP3 and OMAP4. Use dss features to calculate the register fields and min/max values based on current OMAP revision. Signed-off-by:
Archit Taneja <archit@ti.com> Signed-off-by:
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Taneja, Archit authored
Create 2 functions dss_feat_get_param_min() and dss_feat_get_param_max() which return the minimum and maximum value of a parameter. Introduce a enum in dss_features called dss_range_param which contains parameters whose ranges we are interested in. Replace this with dss_feat_get_max_dss_fck() which is specific to the parameter DSS_FCK. Signed-off-by:
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Taneja, Archit authored
The structures dss_reg_field and dss_clk_source_name have enum members which specify the register field and the clock source respectively. These members are not used to choose the correct result in the corresponding feature functions. Remove these members and change the features array declaration to incorporate these enums. The structure dss_clk_source_name without the enum member is just a pointer to an string. Remove the structure and use a character pointer directly. Signed-off-by:
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- 14 Mar, 2011 1 commit
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Tomi Valkeinen authored
Something seems to be wrong with OMAP4 & VENC, and register access fails in omap_venchw_probe(). This patch skips venc driver registration on OMAP4, thus circumventing the problem for now. Signed-off-by:
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- 11 Mar, 2011 17 commits
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Steve Sakoman authored
This patch adds support for the standard push buttons available on Overo expansion boards. Signed-off-by:
Steve Sakoman <steve@sakoman.com> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
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Steve Sakoman authored
This patch adds support for the standard LEDs on the Overo COM and expansion boards Signed-off-by:
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Steve Sakoman authored
The ads7846 driver now requires a regulator. This patch adds the necessary regulator to the overo board file. Without it, the following error occurs (and the touchscreen will not function): ads7846 spi1.0: unable to get regulator: -19 Signed-off-by:
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Taneja, Archit authored
On OMAP3, the pixel clock for the LCD manager was derived through DISPC_FCLK as: Lcd Pixel clock = DISPC_FCLK / lcd / pcd Where lcd and pcd are divisors in the DISPC_DIVISOR register. On OMAP4, the pixel clocks for LCD1 and LCD2 managers are derived from 2 new clocks named LCD1_CLK and LCD2_CLK. The pixel clocks are calculated as: Lcd_o Pixel clock = LCDo_CLK / lcdo /pcdo, o = 1, 2 Where lcdo and pcdo registers are divisors in DISPC_DIVISORo registers. LCD1_CLK and LCD2_CLK can have DSS_FCLK, and the M4 divider clocks of DSI1 PLL and DSI2 PLL as clock sources respectively. Introduce functions to select and get the clock source for these new clocks. Modify DISPC functions get the correct lck and pck rates based on the clock source of these clocks. Since OMAP2/3 don't have these clocks, force OMAP2/3 to always have the LCD_CLK source as DSS_CLK_SRC_FCK by introducing a dss feature. Introduce clock source names for OMAP4 and some register field changes in DSS_CTRL on OMAP4. Currently, LCD2_CLK can only have DSS_FCLK as its clock source as DSI2 PLL functionality hasn't been introduced yet. BUG for now if DSI2 PLL is selected as clock. Signed-off-by:
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Taneja, Archit authored
Clean up some of the DSS functions which select/get clock sources, use switch to select the clock source members since more clock sources will be introduced later on. Remove the use of macro CONFIG_OMAP2_DSS_DSI in dispc_fclk_rate, use a dummy inline for function for dsi_get_pll_hsdiv_dispc_rate() instead for code clarity. Signed-off-by:
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Steve Sakoman authored
This patch adds DSS2 support for DVI, S-video, the 480x272 Samsung LTE430WQ-F0C panel, and the 320x240 LG.Philips LB035Q02 panel. Signed-off-by:
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Steve Sakoman authored
This patch adds support for the Gumstix Palo35 expansion board which utilizes the 320 x 240 pixel LG.Philips LB035Q02 LCD Panel Signed-off-by:
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Tomi Valkeinen authored
Fix handling of error in omap_dispc_register_isr() in case there are no free isr slots available. Reported-by:
Ben Tucker <btucker@mpcdata.com> Signed-off-by:
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Murthy, Raghuveer authored
Using dss_features to select independent core clock divider and setting it. Added the register used, to DISPC context save and restore group ----------------------------------------------------------------------- In OMAP4, the minimum DISPC_CORE_CLK required can be expressed as: DISPC_CORE_CLK >= max(PCLK1*HSCALE1, PCLK2*HSCALE2, ...) Where PCLKi is the pixel clock generated by MANAGERi and HSCALEi is the maximum horizontal downscaling done through MANAGERi Based on the usecase, core clk can be increased or decreased at runtime to save power. Such mechanism are not yet implemented. Hence, we set the core clock divisor to 1, to support maximum range of resolutions ------------------------------------------------------------------------ Signed-off-by:
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Murthy, Raghuveer authored
The OMAP4 DISPC_DIVISOR1 is backward compatible to OMAP3xxx DISPC_DIVISOR. However DISPC_DIVISOR is also provided in OMAP4, to control DISPC_CORE_CLK independent of Primary and Secondary display clocks. Renamed DISPC_DIVISOR(ch) to DISPC_DIVISORo(ch), to facilitate introduction of DISPC_DIVISOR register, which is specific for OMAP4. OMAP4 has 3 registers DISPC_DIVISOR, DISPC_DIVISOR1 and DISPC_DIVISOR2. Also updated, all the usages of DISPC_DIVISOR(ch) to DISPC_DIVISORo(ch). Use DISPC_DIVISORo(ch) when DISPC_DIVISOR1 or DISPC_DIVISOR2 has to be configured OMAP4 TRM uses DISPC_DIVISORo generically to refer to DISPC_DIVISOR1 and DISPC_DIVISOR2 Signed-off-by:
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Murthy, Raghuveer authored
In OMAP3xxx DISPC_DIVISOR register has a logical clock divisor (lcd_div) field. The lcd_div is common, for deciding the DISPC core functional clock frequency, and the final pixel clock frequency for LCD display. In OMAP4, there are 2 LCD channels, hence two divisor registers, DISPC_DIVISOR1 and DISPC_DIVISOR2. Also, there is a third register DISPC_DIVISOR. The DISPC_DIVISOR in OMAP4 is used to configure lcd_div exclusively for core functional clock configuration. For pixel clock configuration of primary and secondary LCDs, lcd_div of DISPC_DIVISOR1 and DISPC_DIVISOR2 are used respectively Signed-off-by:
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Tomi Valkeinen authored
On omap4 the registers may not be accessible right after enabling the clocks. At some point this will be handled by pm_runtime, but, for the time begin, adding a small delay after clk_enable() should make things work. Signed-off-by: -
Tomi Valkeinen authored
When using OMAP2_DSS_USE_DSI_PLL, which selects DSI PLL as source clock for DISPC, the DSI needs the vdds_dsi regulator. Latest regulator changes broke this, causing the the code to not acquire the regulator when using OMAP2_DSS_USE_DSI_PLL. This patch acquires the vdds_dsi regulator in dsi_pll_init(), fixing the issue. This is is just a quick hack to get the OMAP2_DSS_USE_DSI_PLL option working. There shouldn't be any other downside in this solution than some extra lines of code. OMAP2_DSS_USE_DSI_PLL is itself a big hack, and should be removed, and the feature itself should be implemented in a more sane way. However, the solution is not trivial, and people are using DSI PLL to get more exact pixel clocks, so this hack is an acceptable temporary solution for the time being. Signed-off-by: -
Archit Taneja authored
Taal driver used to take a hard coded Macro for Virtual Channel and the VC_ID. The Taal panel driver now requests for a Virtual channel through the omap_dsi_request_vc() call in taal_probe(). The channel number returned by the request_vc() call is used for sending command and data to the Panel. The DSI driver automatically configures the Virtual Channel's source to either Video Port or L4 Slave port based on what the panel driver is using it for. The driver uses omap_dsi_release_vc() to free the VC specified by the panel. taal_remove() or when a request_vc() call fails. Signed-off-by:
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Archit Taneja authored
Introduce functions which request and release VC's. This will be used in panel drivers in their probes. omap_dsi_request_vc() takes in the pointer to the omap_dss_device, the VC_ID parameter which goes into the header of the DSI packets, and returns a Virtual channel number (or virtual channel register set) which it can use. omap_dsi_set_vc_id() takes the omap_dss_device pointer, the Virtual Channel number and the VC_ID that needs to be set for the specifed Virtual Channel. omap_dsi_release_vc() takes the omap_dss_device pointer and the Virtual Channel number that needs to be made free. Initialisation of VC parameters is done in dsi_init(). Signed-off-by:
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Tomi Valkeinen authored
cpu_is_omapxxx() was used previously to select the supported interfaces. Now that the interfaces are platform devices, we no longer need to do the check when registering the driver. Thus we can just remove the checks. Signed-off-by: -
Tomi Valkeinen authored
DPI and SDI are different from the other interfaces as they are not hwmods and there is not platform driver for them. They could be said to be a part of DSS or DISPC modules, although it's not a clear definition. This patch moves DPI and SDI initialization into DSS platform driver, making the code more consistent: omap_dss_probe() only initializes platform drivers now. Signed-off-by:
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