1. 23 Apr, 2003 5 commits
  2. 22 Apr, 2003 12 commits
  3. 21 Apr, 2003 16 commits
  4. 22 Apr, 2003 2 commits
  5. 21 Apr, 2003 5 commits
    • Eli Carter's avatar
      [ARM PATCH] 1510/1: use a #define for asm jump address · e4877513
      Eli Carter authored
      Patch from Eli Carter
      
      # Mon Apr 21 11:11:41 CDT 2003 ejc@rnd-linux-c84
      # use-physoffset-define
      #
      # Use the PHYS_OFFSET #define instead of a hard-coded value.
      #
      # Diffed against linux-2.5.67-rmk1+1501-3+1506
      #
      #  arch/arm/boot/compressed/head-xscale.S |    2 +-
      #  1 files changed, 1 insertion(+), 1 deletion(-)
      #
      e4877513
    • Eli Carter's avatar
      [ARM PATCH] 1511/1: iop321 #define cleanup · b2ad716b
      Eli Carter authored
      Patch from Eli Carter
      
      # Mon Apr 21 11:20:06 CDT 2003 ejc@rnd-linux-c84
      # pci-io-mem-size-defines
      #
      # Rename the IOP321_PCI_WINDOW_SIZE #defines to use
      # IOP321_PCI_{IO,MEM}_{BASE,SIZE} instead.  This makes the #defines a bit more
      # consistent.  No functional change, though it does bring up the question of
      # whether res[].end should be BASE+SIZE-1 or BASE+SIZE.
      #
      # Diffed against linux-2.5.67-rmk1+1501-3+1506+1508-10
      #
      #  arch/arm/mach-iop3xx/iop321-pci.c    |    8 ++++----
      #  include/asm-arm/arch-iop3xx/iop321.h |   10 ++++------
      #  2 files changed, 8 insertions(+), 10 deletions(-)
      #
      b2ad716b
    • Eli Carter's avatar
      [ARM PATCH] 1508/1: use #define's for iq80321 · cfa4a793
      Eli Carter authored
      Patch from Eli Carter
      
      # Thu Apr 17 16:37:58 CDT 2003 ejc@rnd-linux-c84
      # iq80321-use-addr-defines
      #
      # Use #define's instead of hard-coded numbers for the device locations for the
      # iq80321 board.
      #
      # Diffed against linux-2.5.65-rmk1+1472-4+1502-3+1506
      # Applies cleanly to linux-2.5.67-rmk1+1502-3+1506
      #
      #  arch/arm/mach-iop3xx/mm-321.c |    4 ++--
      #  1 files changed, 2 insertions(+), 2 deletions(-)
      #
      cfa4a793
    • Linus Torvalds's avatar
      Add the Xeon variations (Pentium-III and P4-based) to the list · f5bdbdbf
      Linus Torvalds authored
      of Intel CPU optimizations. From Andi Kleen.
      f5bdbdbf
    • Andi Kleen's avatar
      [PATCH] Runtime memory barrier patching · 8aba0a3d
      Andi Kleen authored
      This implements automatic code patching of memory barriers based
      on the CPU capabilities. Normally lock ; addl $0,(%esp) barriers
      are used, but these are a bit slow on the Pentium 4.
      
      Linus proposed this a few weeks ago after the support for SSE1/SSE2
      barriers was introduced. I now got around to implement it.
      
      The main advantage is that it allows distributors to ship less binary
      kernels but still get fast kernels. In particular it avoids the
      need of a special Pentium 4 kernel.
      
      The patching code is quite generic and could be used to patch
      other instructions (like prefetches or specific other critical
      instructions) too.
      Thanks to Rusty's in kernel loader it also works seamlessly for modules.
      
      The patching is done before other CPUs start to avoid potential
      erratas with self modifying code on SMP systems. It makes no
      attempt to automatically handle assymetric systems (an secondary
      CPU having less capabilities than the boot CPU). In this
      case just boot with "noreplacement"
      8aba0a3d