- 18 Jan, 2023 24 commits
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Konrad Dybcio authored
Add the CPU OPP tables including core frequency and L3 bus frequency. The L3 throughput values were chosen by studying the frequencies available in HW LUT and picking the highest one that's less than the CPU frequency. DDR clock rates come from the vendor kernel. Available values from the HW LUT: 300000000 556800000 652800000 806400000 844800000 940800000 1132800000 1209600000 1286400000 1401600000 1459200000 Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by:
Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230104171643.1004054-3-konrad.dybcio@linaro.org
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Konrad Dybcio authored
Enable the OSM block responsible for scaling the L3 cache. Signed-off-by:
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Dmitry Baryshkov authored
Specify pre-parsed per-sensor calibration nvmem cells in the tsens device node rather than parsing the whole data blob in the driver. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
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Dmitry Baryshkov authored
Specify pre-parsed per-sensor calibration nvmem cells in the tsens device node rather than parsing the whole data blob in the driver. Signed-off-by:
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Dmitry Baryshkov authored
Specify pre-parsed per-sensor calibration nvmem cells in the tsens device node rather than parsing the whole data blob in the driver. Signed-off-by:
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Dmitry Baryshkov authored
The slope values used during tsens calibration differ between msm8976 and msm8956 SoCs. Use SoC-specific compat value for the msm8956 SoC. Fixes: 0484d3ce ("arm64: dts: qcom: Add DTS for MSM8976 and MSM8956 SoCs") Reviewed-by:
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Alex Elder authored
Depending on the platform, either the modem or the AP must load GSI firmware for IPA before it can be used. To date, this has been indicated by the presence or absence of a "modem-init" property. That mechanism has been deprecated. Instead, we indicate how GSI firmware should be loaded by the value of the "qcom,gsi-loader" property. Update all arm64 platforms that use IPA to use the "qcom,gsi-loader" property to specify how the GSI firmware is loaded. Update the affected nodes so the status property is last. Signed-off-by:
Alex Elder <elder@linaro.org> Reviewed-by:
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Krzysztof Kozlowski authored
Bindings expect each pin config to come with a "function" property: sc7280-crd-r3.dtb: pinctrl@f100000: amp-en-state: 'oneOf' conditional failed, one must be fixed: 'function' is a required property 'bias-pull-down', 'drive-strength', 'pins' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+' Signed-off-by:Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
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Krzysztof Kozlowski authored
Correct typo in motor pinctrl node name: msm8916-samsung-a5u-eur.dtb: pinctrl@1000000: 'motor-en-default-stae' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+' Signed-off-by:
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Petr Vorel authored
It's disabled on downstream [1] thus not shown on downstream dmesg. Removing it fixes warnings on v6.1: [ 0.000000] OF: reserved mem: OVERLAP DETECTED! [ 0.000000] dfps_data_mem@3400000 (0x0000000003400000--0x0000000003401000) overlaps with memory@3400000 (0x0000000003400000--0x0000000004600000) [1] https://android.googlesource.com/kernel/msm.git/+/android-7.0.0_r0.17/arch/arm64/boot/dts/lge/msm8992-bullhead.dtsi#137 Fixes: 976d321f ("arm64: dts: qcom: msm8992: Make the DT an overlay on top of 8994") Signed-off-by:
Petr Vorel <petr.vorel@gmail.com> Reviewed-by:
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Petr Vorel authored
Original google firmware reports 12 MiB: [ 0.000000] cma: Found cont_splash_mem@0, memory base 0x0000000003400000, size 12 MiB, limit 0xffffffffffffffff which is actually 12*1024*1024 = 0xc00000. This matches the aosp source [1]: &cont_splash_mem { reg = <0 0x03400000 0 0xc00000>; }; Fixes: 3cb6a271 ("arm64: dts: qcom: msm8992-bullhead: Fix cont_splash_mem mapping") Fixes: 976d321f ("arm64: dts: qcom: msm8992: Make the DT an overlay on top of 8994") [1] https://android.googlesource.com/kernel/msm.git/+/android-7.0.0_r0.17/arch/arm64/boot/dts/lge/msm8992-bullhead.dtsi#141Signed-off-by: -
Bjorn Andersson authored
Qualcomm ARM64 DTS fixes for 6.2 The cluster idle issue was resolved on SM8250, so the change disabling the cluster state is being reverted. Issues where identified with the QMP PHY binding, that would prevent enablement of Displayport and it was decided not to support the old binding for the recently introduced SC8280XP, which broke USB. This adjusts the USB PHY nodes to the new binding. The reset signal for the first QMP PHY is corrected as well. The reserved memory map is updated on Xiaomi Mi 4C and Huawei Nexus 6P, to avoid instabilities caused by use of protected memory regions. The compatible for the MSM8992 TCSR mutex is corrected as well. Lastly SDHCI interconnects on SM8350 are corrected to match the providers #interconnect-cells.
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Robert Foss authored
Use two interconnect cells in order to optionally support a path tag. Signed-off-by:
Robert Foss <robert.foss@linaro.org> Reviewed-by:
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Robert Foss authored
Add GPIO line names as described by the sm8350-hdk schematic. Signed-off-by:
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Bjorn Andersson authored
While booting the CRD, a series of CMA allocation errors can be seen in the kernel log: cma: cma_alloc: reserved: alloc failed, req-size: 128 pages, ret: -12 Growing the CMA region and querying /proc/meminfo indicates that a newly booted system (currently) uses 64MB CMA. Define a memory region sufficiently large for the current use cases, to avoid forcing users to add this themselves, through command line parameters etc. While fixing the CRD define the same region for the X13s. Tested-by: Andrew Halaney <ahalaney@redhat.com> # sc8280xp-lenovo-thinkpad-x13s Reviewed-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by:
Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by:
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Judy Hsiao authored
1. Add DisplayPort sound node and lpass_cpu node. 2. Adjust the dai-link order to make the order to be consistent with sc7280-herobrine-audio-rt5682-3mic.dtsi. Signed-off-by:
Judy Hsiao <judyhsiao@chromium.org> Reviewed-by:
Douglas Anderson <dianders@chromium.org> Signed-off-by:
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Johan Hovold authored
Clean up the wcd938x codec node somewhat by adding newline separators, reordering properties and renaming it 'audio-codec'. Signed-off-by:
Johan Hovold <johan+linaro@kernel.org> Reviewed-by:
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Johan Hovold authored
The wcd938x codec is not a memory-mapped device and does not belong under the soc node. Move the node to the root node to avoid DT validation failures. While at it, clean up the node somewhat by reordering properties and renaming it 'audio-codec'. Signed-off-by:
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Johan Hovold authored
The wcd938x codec is not a memory-mapped device and does not belong under the soc node. Move the node to the root node to avoid DT validation failures. While at it, clean up the node somewhat by adding newline separators, reordering properties and renaming it 'audio-codec'. Reviewed-by:
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Johan Hovold authored
Move the vamacro node to restore the alphabetical sort order. While at it, add some newline separators to improve readability. Signed-off-by:
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Johan Hovold authored
The sound nodes in the SoC dtsi should be disabled by default. Note that the lpass-tlmm and macro blocks depend on having the board dts enable the adsp and specifying an appropriate firmware to enable the q6prm clock controller. Reviewed-by:
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Krzysztof Kozlowski authored
tx-macro does not have children and does not allow address/size cells: sc8280xp-crd.dtb: txmacro@3220000: Unevaluated properties are not allowed ('#address-cells', '#size-cells' were unexpected) Signed-off-by: -
Krzysztof Kozlowski authored
There is no "clock-controller" property: sa8295p-adp.dtb: service@2: clock-controller: 'clock-controller' does not match any of the regexes: 'pinctrl-[0-9]+' From schema: Documentation/devicetree/bindings/sound/qcom,q6prm.yaml Signed-off-by: -
Krzysztof Kozlowski authored
Neither qcom,sm8250-lpass-rx-macro bindings nor the driver use "clock-frequency" property. sm8250-mtp.dtb: rxmacro@3200000: Unevaluated properties are not allowed ('clock-frequency' was unexpected) Signed-off-by:
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- 17 Jan, 2023 15 commits
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Yunlong Jia authored
Add the string to load RF output power table for pazquel360 project. Signed-off-by:
Yunlong Jia <ecs.beijing2022@gmail.com> Reviewed-by:
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Bhupesh Sharma authored
Add dtsi nodes related to coresight debug units such as cti, etm, etr, funnel(s), replicator(s), etc. for Qualcomm sm6115 SoC. Reviewed-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by:
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Robert Foss authored
The sm8350-hdk ships with the LT9611 UXC DSI/HDMI bridge chip. In order to toggle the board to enable the HDMI output, switch #7 & #8 on the rightmost multi-switch package have to be toggled to On. Signed-off-by:
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Robert Foss authored
Enable the display subsystem and the dsi0 output for the sm8350-hdk board. Signed-off-by:
Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by:
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Robert Foss authored
Add mdss, mdss_mdp, dsi0, dsi0_phy nodes. With these nodes the display subsystem is configured to support one DSI output. Signed-off-by:
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Abel Vesa authored
Enable UFS host controller and PHY node on SM8550 MTP board. Signed-off-by:
Abel Vesa <abel.vesa@linaro.org> Signed-off-by:
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Abel Vesa authored
Add UFS host controller and PHY nodes. Signed-off-by:
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Konrad Dybcio authored
Reserve the bit of memory that simplefb uses to ensure it can always probe. Signed-off-by:
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Konrad Dybcio authored
Rename the reserved-memory subnodes such that they don't use undescores. Signed-off-by:
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Kuogee Hsieh authored
Move data-lanes property from mdss_dp node to dp_out endpoint. Also add link-frequencies property into dp_out endpoint as well. The last frequency specified at link-frequencies will be the max link rate supported by DP. Signed-off-by:
Kuogee Hsieh <quic_khsieh@quicinc.com> Signed-off-by:
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Krzysztof Kozlowski authored
Bindings expect DAI children to be named "dai-link": sc7180-trogdor-coachz-r1.dtb: lpass@62d87000: Unevaluated properties are not allowed ('hdmi@5', 'mi2s@0', 'mi2s@1' were unexpected) Signed-off-by: -
Krzysztof Kozlowski authored
Display clock controller bindings do not allow power-domain-names: sm8350-hdk.dtb: clock-controller@af00000: 'power-domain-names' does not match any of the regexes: 'pinctrl-[0-9]+' From schema: Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml Signed-off-by:
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Dmitry Baryshkov authored
Remove manually created symbol clocks and replace them with clocks provided by PHY. Reviewed-by:
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Dmitry Baryshkov authored
Enable PCIe0 and PCIe1 hosts found on SM8350 HDK board. Signed-off-by:
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Dmitry Baryshkov authored
Add PCIe0 and PCIe1 (and corresponding PHY) devices found on SM8350 platform. The PCIe0 is a 1-lane Gen3 host, PCIe1 is a 2-lane Gen3 host. Signed-off-by:
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- 12 Jan, 2023 1 commit
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Bjorn Andersson authored
While MDSS_GDSC is a subdomain of MMCX, Linux does not respect this relationship and sometimes invokes sync_state on the rpmhpd (MMCX) before the DisplayPort controller has had a chance to probe. The result when this happens is that the power is lost to the multimedia subsystem between the probe of msm_drv and the DisplayPort controller - which results in an irrecoverable state. While this is an implementation problem, this aligns the power domain setting of the one DP instance with that of all the others. Fixes: 57d6ef68 ("arm64: dts: qcom: sc8280xp: Define some of the display blocks") Signed-off-by:
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