1. 16 Jul, 2024 17 commits
    • Paolo Bonzini's avatar
      Merge branch 'kvm-6.11-sev-attestation' into HEAD · bc9cd5a2
      Paolo Bonzini authored
      The GHCB 2.0 specification defines 2 GHCB request types to allow SNP guests
      to send encrypted messages/requests to firmware: SNP Guest Requests and SNP
      Extended Guest Requests. These encrypted messages are used for things like
      servicing attestation requests issued by the guest. Implementing support for
      these is required to be fully GHCB-compliant.
      
      For the most part, KVM only needs to handle forwarding these requests to
      firmware (to be issued via the SNP_GUEST_REQUEST firmware command defined
      in the SEV-SNP Firmware ABI), and then forwarding the encrypted response to
      the guest.
      
      However, in the case of SNP Extended Guest Requests, the host is also
      able to provide the certificate data corresponding to the endorsement key
      used by firmware to sign attestation report requests. This certificate data
      is provided by userspace because:
      
        1) It allows for different keys/key types to be used for each particular
           guest with requiring any sort of KVM API to configure the certificate
           table in advance on a per-guest basis.
      
        2) It provides additional flexibility with how attestation requests might
           be handled during live migration where the certificate data for
           source/dest might be different.
      
        3) It allows all synchronization between certificates and firmware/signing
           key updates to be handled purely by userspace rather than requiring
           some in-kernel mechanism to facilitate it. [1]
      
      To support fetching certificate data from userspace, a new KVM exit type will
      be needed to handle fetching the certificate from userspace. An attempt to
      define a new KVM_EXIT_COCO/KVM_EXIT_COCO_REQ_CERTS exit type to handle this
      was introduced in v1 of this patchset, but is still being discussed by
      community, so for now this patchset only implements a stub version of SNP
      Extended Guest Requests that does not provide certificate data, but is still
      enough to provide compliance with the GHCB 2.0 spec.
      bc9cd5a2
    • Michael Roth's avatar
      KVM: SEV: Provide support for SNP_EXTENDED_GUEST_REQUEST NAE event · 74458e48
      Michael Roth authored
      Version 2 of GHCB specification added support for the SNP Extended Guest
      Request Message NAE event. This event serves a nearly identical purpose
      to the previously-added SNP_GUEST_REQUEST event, but for certain message
      types it allows the guest to supply a buffer to be used for additional
      information in some cases.
      
      Currently the GHCB spec only defines extended handling of this sort in
      the case of attestation requests, where the additional buffer is used to
      supply a table of certificate data corresponding to the attestion
      report's signing key. Support for this extended handling will require
      additional KVM APIs to handle coordinating with userspace.
      
      Whether or not the hypervisor opts to provide this certificate data is
      optional. However, support for processing SNP_EXTENDED_GUEST_REQUEST
      GHCB requests is required by the GHCB 2.0 specification for SNP guests,
      so for now implement a stub implementation that provides an empty
      certificate table to the guest if it supplies an additional buffer, but
      otherwise behaves identically to SNP_GUEST_REQUEST.
      Reviewed-by: default avatarCarlos Bilbao <carlos.bilbao.osdev@gmail.com>
      Reviewed-by: default avatarTom Lendacky <thomas.lendacky@amd.com>
      Reviewed-by: default avatarLiam Merwick <liam.merwick@oracle.com>
      Signed-off-by: default avatarMichael Roth <michael.roth@amd.com>
      Message-ID: <20240701223148.3798365-4-michael.roth@amd.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      74458e48
    • Michael Roth's avatar
      x86/sev: Move sev_guest.h into common SEV header · f55f3c3a
      Michael Roth authored
      sev_guest.h currently contains various definitions relating to the
      format of SNP_GUEST_REQUEST commands to SNP firmware. Currently only the
      sev-guest driver makes use of them, but when the KVM side of this is
      implemented there's a need to parse the SNP_GUEST_REQUEST header to
      determine whether additional information needs to be provided to the
      guest. Prepare for this by moving those definitions to a common header
      that's shared by host/guest code so that KVM can also make use of them.
      Reviewed-by: default avatarTom Lendacky <thomas.lendacky@amd.com>
      Reviewed-by: default avatarLiam Merwick <liam.merwick@oracle.com>
      Signed-off-by: default avatarMichael Roth <michael.roth@amd.com>
      Message-ID: <20240701223148.3798365-3-michael.roth@amd.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      f55f3c3a
    • Brijesh Singh's avatar
      KVM: SEV: Provide support for SNP_GUEST_REQUEST NAE event · 88caf544
      Brijesh Singh authored
      Version 2 of GHCB specification added support for the SNP Guest Request
      Message NAE event. The event allows for an SEV-SNP guest to make
      requests to the SEV-SNP firmware through the hypervisor using the
      SNP_GUEST_REQUEST API defined in the SEV-SNP firmware specification.
      
      This is used by guests primarily to request attestation reports from
      firmware. There are other request types are available as well, but the
      specifics of what guest requests are being made generally does not
      affect how they are handled by the hypervisor, which only serves as a
      proxy for the guest requests and firmware responses.
      
      Implement handling for these events.
      
      When an SNP Guest Request is issued, the guest will provide its own
      request/response pages, which could in theory be passed along directly
      to firmware. However, these pages would need special care:
      
        - Both pages are from shared guest memory, so they need to be
          protected from migration/etc. occurring while firmware reads/writes
          to them. At a minimum, this requires elevating the ref counts and
          potentially needing an explicit pinning of the memory. This places
          additional restrictions on what type of memory backends userspace
          can use for shared guest memory since there would be some reliance
          on using refcounted pages.
      
        - The response page needs to be switched to Firmware-owned state
          before the firmware can write to it, which can lead to potential
          host RMP #PFs if the guest is misbehaved and hands the host a
          guest page that KVM is writing to for other reasons (e.g. virtio
          buffers).
      
      Both of these issues can be avoided completely by using
      separately-allocated bounce pages for both the request/response pages
      and passing those to firmware instead. So that's the approach taken
      here.
      Signed-off-by: default avatarBrijesh Singh <brijesh.singh@amd.com>
      Co-developed-by: default avatarAlexey Kardashevskiy <aik@amd.com>
      Signed-off-by: default avatarAlexey Kardashevskiy <aik@amd.com>
      Co-developed-by: default avatarAshish Kalra <ashish.kalra@amd.com>
      Signed-off-by: default avatarAshish Kalra <ashish.kalra@amd.com>
      Reviewed-by: default avatarTom Lendacky <thomas.lendacky@amd.com>
      Reviewed-by: default avatarLiam Merwick <liam.merwick@oracle.com>
      [mdr: ensure FW command failures are indicated to guest, drop extended
       request handling to be re-written as separate patch, massage commit]
      Signed-off-by: default avatarMichael Roth <michael.roth@amd.com>
      Message-ID: <20240701223148.3798365-2-michael.roth@amd.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      88caf544
    • Sean Christopherson's avatar
      KVM: x86: Suppress MMIO that is triggered during task switch emulation · 2a1fc7dc
      Sean Christopherson authored
      Explicitly suppress userspace emulated MMIO exits that are triggered when
      emulating a task switch as KVM doesn't support userspace MMIO during
      complex (multi-step) emulation.  Silently ignoring the exit request can
      result in the WARN_ON_ONCE(vcpu->mmio_needed) firing if KVM exits to
      userspace for some other reason prior to purging mmio_needed.
      
      See commit 0dc90226 ("KVM: x86: Suppress pending MMIO write exits if
      emulator detects exception") for more details on KVM's limitations with
      respect to emulated MMIO during complex emulator flows.
      
      Reported-by: syzbot+2fb9f8ed752c01bc9a3f@syzkaller.appspotmail.com
      Signed-off-by: default avatarSean Christopherson <seanjc@google.com>
      Message-ID: <20240712144841.1230591-1-seanjc@google.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      2a1fc7dc
    • Sean Christopherson's avatar
      KVM: x86/mmu: Clean up make_huge_page_split_spte() definition and intro · 9fe17d2a
      Sean Christopherson authored
      Tweak the definition of make_huge_page_split_spte() to eliminate an
      unnecessarily long line, and opportunistically initialize child_spte to
      make it more obvious that the child is directly derived from the huge
      parent.
      
      No functional change intended.
      Signed-off-by: default avatarSean Christopherson <seanjc@google.com>
      Message-ID: <20240712151335.1242633-3-seanjc@google.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      9fe17d2a
    • Sean Christopherson's avatar
      KVM: x86/mmu: Bug the VM if KVM tries to split a !hugepage SPTE · 3d4415ed
      Sean Christopherson authored
      Bug the VM instead of simply warning if KVM tries to split a SPTE that is
      non-present or not-huge.  KVM is guaranteed to end up in a broken state as
      the callers fully expect a valid SPTE, e.g. the shadow MMU will add an
      rmap entry, and all MMUs will account the expected small page.  Returning
      '0' is also technically wrong now that SHADOW_NONPRESENT_VALUE exists,
      i.e. would cause KVM to create a potential #VE SPTE.
      
      While it would be possible to have the callers gracefully handle failure,
      doing so would provide no practical value as the scenario really should be
      impossible, while the error handling would add a non-trivial amount of
      noise.
      
      Fixes: a3fe5dbd ("KVM: x86/mmu: Split huge pages mapped by the TDP MMU when dirty logging is enabled")
      Cc: David Matlack <dmatlack@google.com>
      Signed-off-by: default avatarSean Christopherson <seanjc@google.com>
      Message-ID: <20240712151335.1242633-2-seanjc@google.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      3d4415ed
    • Paolo Bonzini's avatar
      Merge tag 'kvm-x86-vmx-6.11' of https://github.com/kvm-x86/linux into HEAD · 208a352a
      Paolo Bonzini authored
      KVM VMX changes for 6.11
      
       - Remove an unnecessary EPT TLB flush when enabling hardware.
      
       - Fix a series of bugs that cause KVM to fail to detect nested pending posted
         interrupts as valid wake eents for a vCPU executing HLT in L2 (with
         HLT-exiting disable by L1).
      
       - Misc cleanups
      208a352a
    • Paolo Bonzini's avatar
      Merge tag 'kvm-x86-svm-6.11' of https://github.com/kvm-x86/linux into HEAD · 1229cbef
      Paolo Bonzini authored
      KVM SVM changes for 6.11
      
       - Make per-CPU save_area allocations NUMA-aware.
      
       - Force sev_es_host_save_area() to be inlined to avoid calling into an
         instrumentable function from noinstr code.
      1229cbef
    • Paolo Bonzini's avatar
      Merge tag 'kvm-x86-selftests-6.11' of https://github.com/kvm-x86/linux into HEAD · dbfd50cb
      Paolo Bonzini authored
      KVM selftests for 6.11
      
       - Remove dead code in the memslot modification stress test.
      
       - Treat "branch instructions retired" as supported on all AMD Family 17h+ CPUs.
      
       - Print the guest pseudo-RNG seed only when it changes, to avoid spamming the
         log for tests that create lots of VMs.
      
       - Make the PMU counters test less flaky when counting LLC cache misses by
         doing CLFLUSH{OPT} in every loop iteration.
      dbfd50cb
    • Paolo Bonzini's avatar
      Merge tag 'kvm-x86-pmu-6.11' of https://github.com/kvm-x86/linux into HEAD · cda231cd
      Paolo Bonzini authored
      KVM x86/pmu changes for 6.11
      
       - Don't advertise IA32_PERF_GLOBAL_OVF_CTRL as an MSR-to-be-saved, as it reads
         '0' and writes from userspace are ignored.
      
       - Update to the newfangled Intel CPU FMS infrastructure.
      
       - Use macros instead of open-coded literals to clean up KVM's manipulation of
         FIXED_CTR_CTRL MSRs.
      cda231cd
    • Paolo Bonzini's avatar
      Merge tag 'kvm-x86-mtrrs-6.11' of https://github.com/kvm-x86/linux into HEAD · 5c5ddf71
      Paolo Bonzini authored
      KVM x86 MTRR virtualization removal
      
      Remove support for virtualizing MTRRs on Intel CPUs, along with a nasty CR0.CD
      hack, and instead always honor guest PAT on CPUs that support self-snoop.
      5c5ddf71
    • Paolo Bonzini's avatar
      Merge tag 'kvm-x86-mmu-6.11' of https://github.com/kvm-x86/linux into HEAD · 34b69ede
      Paolo Bonzini authored
      KVM x86 MMU changes for 6.11
      
       - Don't allocate kvm_mmu_page.shadowed_translation for shadow pages that can't
         hold leafs SPTEs.
      
       - Unconditionally drop mmu_lock when allocating TDP MMU page tables for eager
         page splitting to avoid stalling vCPUs when splitting huge pages.
      
       - Misc cleanups
      34b69ede
    • Paolo Bonzini's avatar
      Merge tag 'kvm-x86-misc-6.11' of https://github.com/kvm-x86/linux into HEAD · 5dcc1e76
      Paolo Bonzini authored
      KVM x86 misc changes for 6.11
      
       - Add a global struct to consolidate tracking of host values, e.g. EFER, and
         move "shadow_phys_bits" into the structure as "maxphyaddr".
      
       - Add KVM_CAP_X86_APIC_BUS_CYCLES_NS to allow configuring the effective APIC
         bus frequency, because TDX.
      
       - Print the name of the APICv/AVIC inhibits in the relevant tracepoint.
      
       - Clean up KVM's handling of vendor specific emulation to consistently act on
         "compatible with Intel/AMD", versus checking for a specific vendor.
      
       - Misc cleanups
      5dcc1e76
    • Paolo Bonzini's avatar
      Merge tag 'kvm-x86-generic-6.11' of https://github.com/kvm-x86/linux into HEAD · 86014c1e
      Paolo Bonzini authored
      KVM generic changes for 6.11
      
       - Enable halt poll shrinking by default, as Intel found it to be a clear win.
      
       - Setup empty IRQ routing when creating a VM to avoid having to synchronize
         SRCU when creating a split IRQCHIP on x86.
      
       - Rework the sched_in/out() paths to replace kvm_arch_sched_in() with a flag
         that arch code can use for hooking both sched_in() and sched_out().
      
       - Take the vCPU @id as an "unsigned long" instead of "u32" to avoid
         truncating a bogus value from userspace, e.g. to help userspace detect bugs.
      
       - Mark a vCPU as preempted if and only if it's scheduled out while in the
         KVM_RUN loop, e.g. to avoid marking it preempted and thus writing guest
         memory when retrieving guest state during live migration blackout.
      
       - A few minor cleanups
      86014c1e
    • Paolo Bonzini's avatar
      Merge tag 'kvm-x86-fixes-6.10-11' of https://github.com/kvm-x86/linux into HEAD · f4501e8b
      Paolo Bonzini authored
      KVM Xen:
      
      Fix a bug where KVM fails to check the validity of an incoming userspace
      virtual address and tries to activate a gfn_to_pfn_cache with a kernel address.
      f4501e8b
    • Paolo Bonzini's avatar
      Merge tag 'kvmarm-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD · 1c5a0b55
      Paolo Bonzini authored
      KVM/arm64 changes for 6.11
      
       - Initial infrastructure for shadow stage-2 MMUs, as part of nested
         virtualization enablement
      
       - Support for userspace changes to the guest CTR_EL0 value, enabling
         (in part) migration of VMs between heterogenous hardware
      
       - Fixes + improvements to pKVM's FF-A proxy, adding support for v1.1 of
         the protocol
      
       - FPSIMD/SVE support for nested, including merged trap configuration
         and exception routing
      
       - New command-line parameter to control the WFx trap behavior under KVM
      
       - Introduce kCFI hardening in the EL2 hypervisor
      
       - Fixes + cleanups for handling presence/absence of FEAT_TCRX
      
       - Miscellaneous fixes + documentation updates
      1c5a0b55
  2. 14 Jul, 2024 8 commits
    • Oliver Upton's avatar
      Merge branch kvm-arm64/docs into kvmarm/next · bb032b23
      Oliver Upton authored
      * kvm-arm64/docs:
        : KVM Documentation fixes, courtesy of Changyuan Lyu
        :
        : Small set of typo fixes / corrections to the KVM API documentation
        : relating to MSIs and arm64 VGIC UAPI.
        MAINTAINERS: Include documentation in KVM/arm64 entry
        KVM: Documentation: Correct the VGIC V2 CPU interface addr space size
        KVM: Documentation: Enumerate allowed value macros of `irq_type`
        KVM: Documentation: Fix typo `BFD`
      Signed-off-by: default avatarOliver Upton <oliver.upton@linux.dev>
      bb032b23
    • Oliver Upton's avatar
      Merge branch kvm-arm64/nv-tcr2 into kvmarm/next · bc2e3253
      Oliver Upton authored
      * kvm-arm64/nv-tcr2:
        : Fixes to the handling of TCR_EL1, courtesy of Marc Zyngier
        :
        : Series addresses a couple gaps that are present in KVM (from cover
        : letter):
        :
        :   - VM configuration: HCRX_EL2.TCR2En is forced to 1, and we blindly
        :     save/restore stuff.
        :
        :   - trap bit description and routing: none, obviously, since we make a
        :     point in not trapping.
        KVM: arm64: Honor trap routing for TCR2_EL1
        KVM: arm64: Make PIR{,E0}_EL1 save/restore conditional on FEAT_TCRX
        KVM: arm64: Make TCR2_EL1 save/restore dependent on the VM features
        KVM: arm64: Get rid of HCRX_GUEST_FLAGS
        KVM: arm64: Correctly honor the presence of FEAT_TCRX
      Signed-off-by: default avatarOliver Upton <oliver.upton@linux.dev>
      bc2e3253
    • Oliver Upton's avatar
      Merge branch kvm-arm64/nv-sve into kvmarm/next · 8c2899e7
      Oliver Upton authored
      * kvm-arm64/nv-sve:
        : CPTR_EL2, FPSIMD/SVE support for nested
        :
        : This series brings support for honoring the guest hypervisor's CPTR_EL2
        : trap configuration when running a nested guest, along with support for
        : FPSIMD/SVE usage at L1 and L2.
        KVM: arm64: Allow the use of SVE+NV
        KVM: arm64: nv: Add additional trap setup for CPTR_EL2
        KVM: arm64: nv: Add trap description for CPTR_EL2
        KVM: arm64: nv: Add TCPAC/TTA to CPTR->CPACR conversion helper
        KVM: arm64: nv: Honor guest hypervisor's FP/SVE traps in CPTR_EL2
        KVM: arm64: nv: Load guest FP state for ZCR_EL2 trap
        KVM: arm64: nv: Handle CPACR_EL1 traps
        KVM: arm64: Spin off helper for programming CPTR traps
        KVM: arm64: nv: Ensure correct VL is loaded before saving SVE state
        KVM: arm64: nv: Use guest hypervisor's max VL when running nested guest
        KVM: arm64: nv: Save guest's ZCR_EL2 when in hyp context
        KVM: arm64: nv: Load guest hyp's ZCR into EL1 state
        KVM: arm64: nv: Handle ZCR_EL2 traps
        KVM: arm64: nv: Forward SVE traps to guest hypervisor
        KVM: arm64: nv: Forward FP/ASIMD traps to guest hypervisor
      Signed-off-by: default avatarOliver Upton <oliver.upton@linux.dev>
      8c2899e7
    • Oliver Upton's avatar
      Merge branch kvm-arm64/el2-kcfi into kvmarm/next · 1270dad3
      Oliver Upton authored
      * kvm-arm64/el2-kcfi:
        : kCFI support in the EL2 hypervisor, courtesy of Pierre-Clément Tosi
        :
        : Enable the usage fo CONFIG_CFI_CLANG (kCFI) for hardening indirect
        : branches in the EL2 hypervisor. Unlike kernel support for the feature,
        : CFI failures at EL2 are always fatal.
        KVM: arm64: nVHE: Support CONFIG_CFI_CLANG at EL2
        KVM: arm64: Introduce print_nvhe_hyp_panic helper
        arm64: Introduce esr_brk_comment, esr_is_cfi_brk
        KVM: arm64: VHE: Mark __hyp_call_panic __noreturn
        KVM: arm64: nVHE: gen-hyprel: Skip R_AARCH64_ABS32
        KVM: arm64: nVHE: Simplify invalid_host_el2_vect
        KVM: arm64: Fix __pkvm_init_switch_pgd call ABI
        KVM: arm64: Fix clobbered ELR in sync abort/SError
      Signed-off-by: default avatarOliver Upton <oliver.upton@linux.dev>
      1270dad3
    • Oliver Upton's avatar
      Merge branch kvm-arm64/ctr-el0 into kvmarm/next · 377d0e5d
      Oliver Upton authored
      * kvm-arm64/ctr-el0:
        : Support for user changes to CTR_EL0, courtesy of Sebastian Ott
        :
        : Allow userspace to change the guest-visible value of CTR_EL0 for a VM,
        : so long as the requested value represents a subset of features supported
        : by hardware. In other words, prevent the VMM from over-promising the
        : capabilities of hardware.
        :
        : Make this happen by fitting CTR_EL0 into the existing infrastructure for
        : feature ID registers.
        KVM: selftests: Assert that MPIDR_EL1 is unchanged across vCPU reset
        KVM: arm64: nv: Unfudge ID_AA64PFR0_EL1 masking
        KVM: selftests: arm64: Test writes to CTR_EL0
        KVM: arm64: rename functions for invariant sys regs
        KVM: arm64: show writable masks for feature registers
        KVM: arm64: Treat CTR_EL0 as a VM feature ID register
        KVM: arm64: unify code to prepare traps
        KVM: arm64: nv: Use accessors for modifying ID registers
        KVM: arm64: Add helper for writing ID regs
        KVM: arm64: Use read-only helper for reading VM ID registers
        KVM: arm64: Make idregs debugfs iterator search sysreg table directly
        KVM: arm64: Get sys_reg encoding from descriptor in idregs_debug_show()
      Signed-off-by: default avatarOliver Upton <oliver.upton@linux.dev>
      377d0e5d
    • Oliver Upton's avatar
      Merge branch kvm-arm64/shadow-mmu into kvmarm/next · 435a9f60
      Oliver Upton authored
      * kvm-arm64/shadow-mmu:
        : Shadow stage-2 MMU support for NV, courtesy of Marc Zyngier
        :
        : Initial implementation of shadow stage-2 page tables to support a guest
        : hypervisor. In the author's words:
        :
        :   So here's the 10000m (approximately 30000ft for those of you stuck
        :   with the wrong units) view of what this is doing:
        :
        :     - for each {VMID,VTTBR,VTCR} tuple the guest uses, we use a
        :       separate shadow s2_mmu context. This context has its own "real"
        :       VMID and a set of page tables that are the combination of the
        :       guest's S2 and the host S2, built dynamically one fault at a time.
        :
        :     - these shadow S2 contexts are ephemeral, and behave exactly as
        :       TLBs. For all intent and purposes, they *are* TLBs, and we discard
        :       them pretty often.
        :
        :     - TLB invalidation takes three possible paths:
        :
        :       * either this is an EL2 S1 invalidation, and we directly emulate
        :         it as early as possible
        :
        :       * or this is an EL1 S1 invalidation, and we need to apply it to
        :         the shadow S2s (plural!) that match the VMID set by the L1 guest
        :
        :       * or finally, this is affecting S2, and we need to teardown the
        :         corresponding part of the shadow S2s, which invalidates the TLBs
        KVM: arm64: nv: Truely enable nXS TLBI operations
        KVM: arm64: nv: Add handling of NXS-flavoured TLBI operations
        KVM: arm64: nv: Add handling of range-based TLBI operations
        KVM: arm64: nv: Add handling of outer-shareable TLBI operations
        KVM: arm64: nv: Invalidate TLBs based on shadow S2 TTL-like information
        KVM: arm64: nv: Tag shadow S2 entries with guest's leaf S2 level
        KVM: arm64: nv: Handle FEAT_TTL hinted TLB operations
        KVM: arm64: nv: Handle TLBI IPAS2E1{,IS} operations
        KVM: arm64: nv: Handle TLBI ALLE1{,IS} operations
        KVM: arm64: nv: Handle TLBI VMALLS12E1{,IS} operations
        KVM: arm64: nv: Handle TLB invalidation targeting L2 stage-1
        KVM: arm64: nv: Handle EL2 Stage-1 TLB invalidation
        KVM: arm64: nv: Add Stage-1 EL2 invalidation primitives
        KVM: arm64: nv: Unmap/flush shadow stage 2 page tables
        KVM: arm64: nv: Handle shadow stage 2 page faults
        KVM: arm64: nv: Implement nested Stage-2 page table walk logic
        KVM: arm64: nv: Support multiple nested Stage-2 mmu structures
      Signed-off-by: default avatarOliver Upton <oliver.upton@linux.dev>
      435a9f60
    • Oliver Upton's avatar
      Merge branch kvm-arm64/ffa-1p1 into kvmarm/next · a35d5b20
      Oliver Upton authored
      * kvm-arm64/ffa-1p1:
        : Improvements to the pKVM FF-A Proxy, courtesy of Sebastian Ene
        :
        : Various minor improvements to how host FF-A calls are proxied with the
        : TEE, along with support for v1.1 of the protocol.
        KVM: arm64: Use FF-A 1.1 with pKVM
        KVM: arm64: Update the identification range for the FF-A smcs
        KVM: arm64: Add support for FFA_PARTITION_INFO_GET
        KVM: arm64: Trap FFA_VERSION host call in pKVM
      Signed-off-by: default avatarOliver Upton <oliver.upton@linux.dev>
      a35d5b20
    • Oliver Upton's avatar
      Merge branch kvm-arm64/misc into kvmarm/next · bd2e9513
      Oliver Upton authored
      * kvm-arm64/misc:
        : Miscellaneous updates
        :
        :  - Provide a command-line parameter to statically control the WFx trap
        :    selection in KVM
        :
        :  - Make sysreg masks allocation accounted
        Revert "KVM: arm64: nv: Fix RESx behaviour of disabled FGTs with negative polarity"
        KVM: arm64: nv: Use GFP_KERNEL_ACCOUNT for sysreg_masks allocation
        KVM: arm64: nv: Fix RESx behaviour of disabled FGTs with negative polarity
        KVM: arm64: Add early_param to control WFx trapping
      Signed-off-by: default avatarOliver Upton <oliver.upton@linux.dev>
      bd2e9513
  3. 12 Jul, 2024 13 commits
  4. 10 Jul, 2024 1 commit
    • Bibo Mao's avatar
      perf kvm: Add kvm-stat for loongarch64 · 492ac37f
      Bibo Mao authored
      Add support for 'perf kvm stat' on loongarch64 platform, now only kvm
      exit event is supported.
      
      Here is example output about "perf kvm --host stat report" command
      
         Event name   Samples   Sample%     Time (ns)   Time%   Mean Time (ns)
          Mem Store     83969    51.00%     625697070   8.00%             7451
           Mem Read     37641    22.00%     112485730   1.00%             2988
          Interrupt     15542     9.00%      20620190   0.00%             1326
              IOCSR     15207     9.00%      94296190   1.00%             6200
          Hypercall      4873     2.00%      12265280   0.00%             2516
               Idle      3713     2.00%    6322055860  87.00%          1702681
                FPU      1819     1.00%       2750300   0.00%             1511
         Inst Fetch       502     0.00%       1341740   0.00%             2672
         Mem Modify       324     0.00%        602240   0.00%             1858
             CPUCFG        55     0.00%         77610   0.00%             1411
                CSR        12     0.00%         19690   0.00%             1640
               LASX         3     0.00%          4870   0.00%             1623
                LSX         2     0.00%          2100   0.00%             1050
      Signed-off-by: default avatarBibo Mao <maobibo@loongson.cn>
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      492ac37f
  5. 09 Jul, 2024 1 commit
    • Bibo Mao's avatar
      LoongArch: KVM: Add PV steal time support in guest side · 03779999
      Bibo Mao authored
      Per-cpu struct kvm_steal_time is added here, its size is 64 bytes and
      also defined as 64 bytes, so that the whole structure is in one physical
      page.
      
      When a VCPU is online, function pv_enable_steal_time() is called. This
      function will pass guest physical address of struct kvm_steal_time and
      tells hypervisor to enable steal time. When a vcpu is offline, physical
      address is set as 0 and tells hypervisor to disable steal time.
      
      Here is an output of vmstat on guest when there is workload on both host
      and guest. It shows steal time stat information.
      
      procs -----------memory---------- -----io---- -system-- ------cpu-----
       r  b   swpd   free  inact active   bi    bo   in   cs us sy id wa st
      15  1      0 7583616 184112  72208    20    0  162   52 31  6 43  0 20
      17  0      0 7583616 184704  72192    0     0 6318 6885  5 60  8  5 22
      16  0      0 7583616 185392  72144    0     0 1766 1081  0 49  0  1 50
      16  0      0 7583616 184816  72304    0     0 6300 6166  4 62 12  2 20
      18  0      0 7583632 184480  72240    0     0 2814 1754  2 58  4  1 35
      Signed-off-by: default avatarBibo Mao <maobibo@loongson.cn>
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      03779999