- 20 May, 2014 5 commits
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Olof Johansson authored
Merge tag 'renesas-soc-cleanup-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Renesas ARM Based SoC soc-cleanup Updates for v3.16" from Simon Horman: r8a7791 (R-Car H2) SoC and its Koelsch board and, r8a7740 (R-Mobile A1) SoC and its Armadillo800eva board * Set CPU clock frequency from OF nodes * tag 'renesas-soc-cleanup-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Set clock frequency in HZ from OF nodes ARM: shmobile: Use shmobile_init_late() on r8a7740 ARM: shmobile: Remove unused r8a7791_init_early() ARM: shmobile: Use r8a7791 DT CPU Frequency for Koelsch ARM: shmobile: Use r8a7791 DT CPU Frequency in common case ARM: shmobile: Remove unused r8a7740_init_delay() ARM: shmobile: Use r8a7740 DT CPU Frequency for Armadillo DT Ref ARM: shmobile: Use r8a7740 DT CPU Frequency in common case ARM: shmobile: Add r8a7740 Maximum CPU Frequency to DTS Signed-off-by:
Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'renesas-clock2-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Second Round of Renesas ARM Based SoC Clock Updates for v3.16" from Simon Horman: r8a7791 (R-Car M2) SoC * Correct SYS-DMAC clock defines r8a7740 (R-Mobile A1) SoC * Correct name of DT Ethernet clock * tag 'renesas-clock2-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7791: Correct SYS-DMAC clock defines ARM: shmobile: r8a7740: Correct name of DT Ethernet clock Signed-off-by:
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Olof Johansson authored
Bring in the cleanup branch due to conflicts in new additions. Should really have been the base before the other branch, but this way works too. * cleanup/kconfig: ARM: qcom: clean-up unneeded kconfig selects ARM: bcm: clean-up unneeded kconfig selects ARM: mvebu: clean-up unneeded kconfig selects Signed-off-by: -
git://git.infradead.org/linux-mvebuOlof Johansson authored
Merge "ARM: mvebu: SoC changes for v3.16" from Jason Cooper: mvebu SoC changes for v3.16 - Armada 375/38x coherency support - Armada 375/38x SMP support - mvebu PMSU and CPU reset support - Armada 370/XP cpuidle support - kirkwood remove platform init of audio device - small fixes and cleanup for new SoC (375/38x) Note: - due to complex deps, cpuidle changes Acked by appropriate maintainer for going though arm-soc tree. * tag 'mvebu-soc-3.16' of git://git.infradead.org/linux-mvebu: (46 commits) ARM: mvebu: Fix pmsu compilation when ARMv6 is selected ARM: mvebu: conditionalize Armada 375 coherency workaround ARM: mvebu: conditionalize Armada 375 SMP workaround ARM: mvebu: add Armada 375 A0 revision definition ARM: mvebu: initialize mvebu-soc-id earlier ARM: mvebu: fix thermal quirk SoC revision check ARM: Kirkwood: t5325: Remove platform device to instantiate audio ARM: Kirkwood: Remove platform driver for codec ARM: mvebu: Add thermal quirk for the Armada 375 DB board ARM: mvebu: Select HAVE_ARM_TWD only if SMP is enabled ARM: mvebu: fix the name of the parameter used in mvebu_get_soc_id ARM: mvebu: remove unnecessary ifdef around l2x0_of_init ARM: mvebu: register the cpuidle driver for the Armada XP SoCs cpuidle: mvebu: Add initial CPU idle support for Armada 370/XP SoC ARM: mvebu: Register notifier callback for the cpuidle transition ARM: mvebu: refine which files are build in mach-mvebu ARM: mvebu: Add the PMSU related part of the cpu idle functions ARM: mvebu: Allow to power down L2 cache controller in idle mode ARM: mvebu: Low level function to disable HW coherency support ARM: mvebu: Split low level functions to manipulate HW coherency ... Signed-off-by:
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git://git.infradead.org/linux-mvebuOlof Johansson authored
Merge "ARM: mvebu: SoC orion5x DT conversion for v3.16" from Jason Cooper: mvebu SoC orion5x DT conversion for v3.16 - orion5x - convert to DT * tag 'mvebu-soc-orion5x-3.16' of git://git.infradead.org/linux-mvebu: (29 commits) ARM: orion: remove no longer needed gpio DT code ARM: orion: remove no longer needed DT IRQ code ARM: orion5x: convert Maxtor Shared Storage II to the Device Tree ARM: orion5x: convert d2net to Device Tree ARM: orion5x: convert RD-88F5182 to Device Tree ARM: orion5x: remove unneeded code for edmini_v2 ARM: orion5x: keep TODO list in edmini_v2 DT ARM: orion5x: use DT to describe NOR on edmini_v2 ARM: orion5x: use DT to describe EHCI on edmini_v2 ARM: orion5x: use DT to describe I2C devices on edmini_v2 ARM: orion5x: convert edmini_v2 to DT pinctrl ARM: orion5x: add standard pinctrl configs for sata0 and sata1 ARM: orion5x: add Device Bus description at SoC level ARM: orion5x: update I2C description at SoC level ARM: orion5x: enable pinctrl driver at SoC level ARM: orion5x: switch to DT interrupts and timer ARM: orion: switch to a per-platform handle_irq() function ARM: orion5x: convert to use 'clocks' property for UART controllers ARM: orion5x: switch to use the clock driver for DT platforms ARM: orion5x: add interrupt for Ethernet in Device Tree ... Signed-off-by:
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- 16 May, 2014 1 commit
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git://github.com/at91linux/linux-at91Olof Johansson authored
Merge "at91: cleanup for 3.16 #1" from Nicolas Ferre: First cleanup series for 3.15 - localize GPIO header in mach-at91 directory - big update on the CCF front with main and slow clocks - a cleanup of ADC and touchscreen driver with unification on IIO and removal of old driver [olof: Most of this branch is new code, not cleanups, so I'm merging this into the SoC branch in spite of the branch name] * tag 'at91-cleanup' of git://github.com/at91linux/linux-at91: (28 commits) ARM: at91/dt: at91-cosino_mega2560 remove useless tsadcc node ARM: at91: remove atmel_tsadcc platform_data Input: atmel_tsadcc: remove driver ARM: at91: remove atmel_tsadcc from sama5_defconfig ARM: at91: sam9rl: switch from atmel_tsadcc to at91_adc ARM: at91: sam9g45: switch from atmel_tsadcc to at91_adc ARM: at91: sam9rlek add touchscreen support through at91_adc ARM: at91: sam9rl: add at91_adc to support adc and touchscreen iio: adc: at91: add sam9rl support iio: adc: at91: remove unused include from include/mach ARM: at91: sam9m10g45ek: Add touchscreen support through at91_adc iio: adc: at91_adc: Add support for touchscreens without TSMR iio: adc: at91: cleanup platform_data ARM: at91: sam9260: remove unused platform_data ARM: at91: sam9g45: remove unused platform_data ARM: at91/dt: define sam9rlek crystal frequencies ARM: at91/dt: move at91sam9rl SoC to the new slow/main clock models ARM: at91/dt: define main xtal frequency of the at91sam9261ek board ARM: at91/dt: move at91sam9261 SoC to the new main clock model ARM: at91/dt: add xtal frequencies to sama5d3 xplained board ... Signed-off-by:
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- 14 May, 2014 1 commit
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Simon Horman authored
shmobile_init_delay() looks for OF "clock-frequency" to determine the delay which is set by calling shmobile_setup_delay(). Unfortunately this seems to be incorrect in detail as "clock-frequency" node values are in HZ whereas the frequency argument to shmobile_setup_delay() is in MHz. Provide a variant of shmobile_setup_delay() that accepts HZ to correct this problem. Signed-off-by:Simon Horman <horms+renesas@verge.net.au>
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- 13 May, 2014 2 commits
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Magnus Damm authored
Hook up ->init_late for r8a7740 to initialize Suspend-to-RAM and CPUIdle in case of C-code less board support for r8a7740. Signed-off-by:
Magnus Damm <damm+renesas@opensource.se> Acked-by:
Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by:
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Geert Uytterhoeven authored
R-Car M2 has two MSTP bits for SYS-DMAC, not one. Also bring the naming in sync with the documentation. This issue was introduced in v3.14, in commit 4d8864c9 ("ARM: shmobile: r8a7791: Add clock index macros for DT sources"). Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Acked-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by:
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- 12 May, 2014 3 commits
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Magnus Damm authored
Remove the now unused r8a7791_init_early() function. Signed-off-by:
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Magnus Damm authored
Convert the Koelsch board support to use shmobile_init_delay() to be able to migrate away from per-SoC delay setup functions. Signed-off-by:
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Magnus Damm authored
Convert the common C-code-less r8a7791 DT board support to use shmobile_init_delay() to be able to migrate away from per-SoC delay setup functions. Signed-off-by:
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- 11 May, 2014 5 commits
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Magnus Damm authored
Remove the now unused r8a7740_init_delay() function. Signed-off-by:
Geert Uytterhoeven <geert@glider.be> Signed-off-by:
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Magnus Damm authored
Convert the Armadillo r8a7740 DT reference board support to use shmobile_init_delay() to be able to migrate away from per-SoC delay setup functions. Signed-off-by:
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Magnus Damm authored
Convert the common C-code-less r8a7740 DT board support to use shmobile_init_delay() to be able to migrate away from per-SoC delay setup functions. Signed-off-by:
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Magnus Damm authored
Add 800 MHz to the r8a7740 DTS to describe the maximum CPU frequency. Signed-off-by:
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Geert Uytterhoeven authored
The preferred node name in DT for an Ethernet device is "ethernet". "sh-eth" was used in preliminary and incomplete bindings. Signed-off-by:
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- 08 May, 2014 23 commits
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Vincent Stehlé authored
When compiling for multiplatform for both ARMv6 and ARMv7, the default compiler flags are for ARMv6, and we will get: /tmp/ccwDEzd0.s: Assembler messages: /tmp/ccwDEzd0.s:639: Error: selected processor does not support ARM mode `isb ' /tmp/ccwDEzd0.s:645: Error: selected processor does not support ARM mode `isb ' /tmp/ccwDEzd0.s:646: Error: selected processor does not support ARM mode `dsb ' /tmp/ccwDEzd0.s:695: Error: selected processor does not support ARM mode `isb ' make[1]: *** [arch/arm/mach-mvebu/pmsu.o] Error 1 Fix this in a similar manner than done previously in commit 72533b77, by specifying ARMv7 flags for pmsu.o. Signed-off-by:
Vincent Stehlé <vincent.stehle@laposte.net> Link: https://lkml.kernel.org/r/1399407782-29091-1-git-send-email-vincent.stehle@laposte.net Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@free-electrons.com> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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Thomas Petazzoni authored
The Armada 375 coherency workaround only needs to be applied to the Z1 revision of the SoC. The A0 and later revisions have been fixed, and no longer need this workaround. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1399302326-6917-6-git-send-email-thomas.petazzoni@free-electrons.comSigned-off-by:
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Thomas Petazzoni authored
The Armada 375 SMP workaround only needs to be applied to the Z1 revision of the SoC. The A0 and later revisions have been fixed, and no longer need this workaround. Note that the initialization of the SMP workaround is delayed from ->smp_prepare_cpus() to ->smp_boot_secondary() because when ->smp_prepare_cpus() is called, the early initcalls have not be called, so the mvebu-soc-id mechanism is not operational. Since the workaround is anyway not needed before the secondary CPU is started, we can delay its implementation until the ->smp_boot_secondary() call. Signed-off-by:
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Thomas Petazzoni authored
Now that we have access to Armada 375 A0 platforms, we can add the corresponding revision definition in mvebu-soc-id.h. Signed-off-by:
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Thomas Petazzoni authored
Currently, the mvebu-soc-id logic is initialized through a core_initcall(). However, we will soon need to know the SoC revision before booting secondary CPUs, because a workaround affects Armada 375 Z1 steppings, but should not be applied on Armada 375 A0 steppings. Unfortunately, core_initcall() are called way too late compared to the SMP initialization. Therefore, the mvebu-soc-id initialization is move to an early_initcall(), which is called before the SMP initialization. Signed-off-by:
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Thomas Petazzoni authored
In commit 54fe26a900bc528f3df1e4235cb6b9ca5c6d4dc2 ('ARM: mvebu: Add thermal quirk for the Armada 375 DB board'), a check on the Armada SoC revision was added to decide whether a quirk for the thermal device should be applied or not. However, the quirk implementation has a bug: it assumes mvebu_get_soc_id() returns true on success, but it returns 0. Therefore, the condition: if (mvebu_get_soc_id(&dev, &rev) && rev > ARMADA_375_Z1_REV) is always false (as long as mvebu-soc-id is properly initialized). As a consequence, the quirk is always applied, even on A0 steppings, for which the quirk should not be applied. This was spotted by testing the thermal driver on Armada 375 A0, which Ezequiel could not do since he does not have access to the A0 revision of the SoC for the moment. Signed-off-by:Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by:
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Andrew Lunn authored
Remove platform device instantiating of the audio, which results in board-t5325.c being removed. A DT node will be added to take its place. Signed-off-by:
Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1399141819-23924-7-git-send-email-andrew@lunn.chSigned-off-by:
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Andrew Lunn authored
Remove the platform driver and platform data for the audio codec. A DT node will replace it. Signed-off-by:
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Ezequiel Garcia authored
The initial release of the Armada 375 DB board has an Armada 375 Z1 stepping silicon. This commit introduces a quirk that allows to workaround a series of issues with the thermal sensor in this stepping, but updating the devicetree: * Updates the compatible string for the thermal, so the driver can perform a specific initialization of the sensor. * Moves the offset of the thermal control register. This quirk allows to specifiy the correct (A0 stepping) offset in the devicetree. Signed-off-by: -
Ezequiel Garcia authored
HAVE_ARM_TWD depends on SMP, so we should only select it if SMP is enabled, as the others platforms do. Signed-off-by:
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Gregory CLEMENT authored
The name of the two parameters of mvebu_get_soc_id were inverted. This patch fix it in order to have a more readable code. Reported-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1397925170-8202-3-git-send-email-gregory.clement@free-electrons.comSigned-off-by:
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Gregory CLEMENT authored
l2x0_of_init function is always defined arch/arm/include/asm/hardware/cache-l2x0.h: in case of CONFIG_CACHE_L2X0 is not selected then a placeholder is defined. Then there is no need to have ifdef around l2x0_of_init. Signed-off-by:
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Gregory CLEMENT authored
The cpuidle is a platform driver so we register the device just after the initialization of the board in an arch_initcall. Signed-off-by:
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Gregory CLEMENT authored
Add the wfi, cpu idle and cpu deep idle power states support for the Armada XP SoCs. All the latencies and the power consumption values used at the "armada_370_xp_idle_driver" structure are preliminary and will be modified in the future after running some measurements and analysis. Based on the work of Nadav Haklai. Signed-off-by:
Nadav Haklai <nadavh@marvell.com> Link: https://lkml.kernel.org/r/1397488214-20685-11-git-send-email-gregory.clement@free-electrons.comSigned-off-by:
Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by:
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Gregory CLEMENT authored
In order to have well encapsulated code, we use notifier callbacks for CPU_PM_ENTER and CPU_PM_EXIT inside the mvebu power management code. Signed-off-by:
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Thomas Petazzoni authored
Following the integration into mach-mvebu of the Kirkwood ARMv5 support, we need to be more careful about which files get built. For example, the pmsu.c file now calls wfi(), which only exists on ARMv7 platforms. Therefore, this commit changes mach-mvebu/Makefile to build the Armada 370/XP/375/38x specific files only when CONFIG_MACH_MVEBU_V7 is enabled. Signed-off-by:
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Gregory CLEMENT authored
The cpu idle support will need to access to Power Management Service Unit. This commit adds the architecture related functions that will be used in the idle path of the cpuidle driver. Signed-off-by:
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Gregory CLEMENT authored
This commit adds a function which adjusts the PMSU configuration to automatically power down the L2 and coherency fabric when we enter a certain idle state. This feature is part of the Power Management Service Unit of the Armada 370 and Armada XP SoCs. Signed-off-by:
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Gregory CLEMENT authored
When going to deep idle we need to disable the SoC snooping (aka hardware coherency support). Playing with the coherency fabric requires to use assembly code to be sure that the compiler doesn't reorder the instructions nor do wrong optimization. Signed-off-by:
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Gregory CLEMENT authored
Actually enabling coherency and adding a CPU on a SMP group are two different operations which can be done separately. This patch splits this in two functions. Moreover as they use common pattern, this patch also creates local low level functions (ll_get_coherency_base and ll_get_cpuid) to be used by the exposed functions (ll_add_cpu_to_smp_group and ll_enable_coherency) Signed-off-by:
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Gregory CLEMENT authored
set_cpu_coherent() took the SMP group ID as parameter. But this parameter was never used, and the CPU always uses the SMP group 0. So we can remove this parameter. Signed-off-by:
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Gregory CLEMENT authored
ll_set_cpu_coherent is always used on the current CPU, so instead of passing the CPU id as argument, ll_set_cpu_coherent() can find it by itself. Signed-off-by:
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Gregory CLEMENT authored
In order to be able to deal with the MMU enabled and the MMU disabled cases, the base address of the coherency registers was passed to the function. The address by itself was not interesting as it can't change for a given SoC, the only thing we need is to have a distinction between the physical or the virtual address. This patch add a check of the MMU bit to choose the accurate address, then the calling function doesn't have to pass this information. Signed-off-by:
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