- 10 Jul, 2018 24 commits
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Leo Liu authored
Fixes: 22cc6c5e (drm/amdgpu: Add runtime VCN PG support) Signed-off-by:
Leo Liu <leo.liu@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Leo Liu authored
To make register read/write reliable Signed-off-by:
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Leo Liu authored
VCN won't get power off when only jpeg active Signed-off-by:
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Thomas Zimmermann authored
A call to ttm_bo_unref() clears the supplied pointer to NULL, while ttm_bo_put() does not. None of the converted call sites requires the pointer to become NULL, so the respective assign operations has been left out from the patch. Signed-off-by:
Thomas Zimmermann <contact@tzimmermann.org> Reviewed-by:
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Thomas Zimmermann authored
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Thomas Zimmermann authored
The TTM buffer-object interface provides ttm_bo_reference() and ttm_bo_unref() for managing reference counts. Replacing them with ttm_bo_get() and ttm_bo_put() aligns the API with conventions used throughout the Linux kernel. The implementation of ttm_bo_unref() clears the supplied pointer to NULL. This leads to workarounds where the caller saves the pointer's value before de-referencing the BO. ttm_bo_put() does not clear the supplied pointer. Signed-off-by:
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Gustavo A. R. Silva authored
Make use of the swap macro and remove unnecessary variable *tmp_mem*. This makes the code easier to read and maintain. Also, reduces the stack usage. This code was detected with the help of Coccinelle. Signed-off-by:
Gustavo A. R. Silva <gustavo@embeddedor.com> Reviewed-by:
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Harry Wentland authored
The previous change wasn't covering smu 7 and 8 and therefore DC was seeing wrong clock values. This fixes an issue where the pipes seem to hang with a 4k DP and 1080p HDMI display. Fixes: c3df50abc84b ("drm/amd/pp: Convert clock unit to KHz as defined") Signed-off-by:Harry Wentland <harry.wentland@amd.com> Acked-by:
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Andrey Grodzovsky authored
Problem: When PD/PT update made by CPU root PD was not yet mapped causing page fault. Fix: Verify root PD is mapped into CPU address space. v2: Make sure that we add the root PD to the relocated list since then it's get mapped into CPU address space bt default in amdgpu_vm_update_directories. v3: Drop change to not move kernel type BOs to evicted list. v4: Remove redundant bo move to relocated list. Link: https://bugs.freedesktop.org/show_bug.cgi?id=107065Signed-off-by:
Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by:
Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by:
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Andrey Grodzovsky authored
Extract and present the reposnsible process and thread when VM_FAULT happens. v2: Use getter and setter functions. Signed-off-by:
Jim Qu <Jim.Qu@amd.com> Signed-off-by:
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Andrey Grodzovsky authored
Add process and thread names and pids and a function to extract this info from relevant amdgpu_vm. v2: Add documentation and fix identation. v3: Add getter and setter functions for amdgpu_task_info. Signed-off-by:
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Harry Wentland authored
const to avoid hard-to-find bugs where some function overrides a function pointer. Signed-off-by:
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Christian König authored
It is good practice to make global function tables const to avoid accidental override. Signed-off-by:
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Christian König authored
Otherwise we try to program hardware with the wrong watermark functions when multiple DCE generations are installed in one system. Signed-off-by:
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Rex Zhu authored
The default clock unit in powerplay is 10KHz. Reviewed-by:
Rex Zhu <Rex.Zhu@amd.com> Signed-off-by:
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Rex Zhu authored
so we can read/write the registers in CLK domain through RREG32/WREG32_SOC15 Reviewed-by:
Evan Quan <evan.quan@amd.com> Signed-off-by:
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Michel Dänzer authored
Without this, there could not be enough slots, which could trigger the BUG_ON in reservation_object_add_shared_fence. v2: * Jump to the error label instead of returning directly (Jerry Zhang) v3: * Reserve slots for command submission after VM updates (Christian König) Cc: stable@vger.kernel.org Bugzilla: https://bugs.freedesktop.org/106418 Reported-by: mikhail.v.gavrilov@gmail.com Signed-off-by:
Michel Dänzer <michel.daenzer@amd.com> Signed-off-by:
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Junwei Zhang authored
kmap happens after bo pin, so unpin is required on error Signed-off-by:
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Junwei Zhang authored
Instead of calling gart address space on every bo pin, allocates it on demand v2: fix error handling v3: drop the change on amdgpu_amdkfd_gpuvm.c, not needed. Signed-off-by:
Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by:
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Junwei Zhang authored
It could be got by amdgpu_bo_gpu_offset() if need Signed-off-by:
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git://people.freedesktop.org/~thomash/linuxDave Airlie authored
This introduces a header update and support for multisample surfaces. Signed-off-by:
Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/d020efb8-776d-5e8f-9d9f-122591e074d6@vmware.com
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git://people.freedesktop.org/~thomash/linuxDave Airlie authored
A series of cleanups / reorganizations and modesetting changes that mostly target atomic state validation. [airlied: conflicts with SPDX stuff in amdgpu tree] Signed-off-by:
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
More features for 4.19: - Use core pcie functionality rather than duplicating our own for pcie gens and lanes - Scheduler function naming cleanups - More documentation - Reworked DC/Powerplay interfaces to improve power savings - Initial stutter mode support for RV (power feature) - Vega12 powerplay updates - GFXOFF fixes - Misc fixes Signed-off-by:
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https://github.com/jsarha/linuxDave Airlie authored
tilcdc pull request for v4.19 Single fix to defer probing. Signed-off-by:
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- 06 Jul, 2018 10 commits
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Deepak Rawat authored
A new param DRM_VMW_PARAM_SM4_1, is added for user space to determine availability of SM4.1. Minor version bump for SM4.1. Signed-off-by:
Deepak Rawat <drawat@vmware.com> Reviewed-by:
Sinclair Yeh <syeh@vmware.com> Reviewed-by:
Brian Paul <brianp@vmware.com> Reviewed-by:
Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by:
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Deepak Rawat authored
Support for SVGA3D_SURFACE_MULTISAMPLE and surface mob size according to sample count. Signed-off-by:
Charmaine Lee <charmainel@vmware.com> Signed-off-by:
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Deepak Rawat authored
New ioctls DRM_VMW_GB_SURFACE_CREATE_EXT and DRM_VMW_GB_SURFACE_REF_EXT are added which support 64-bit wide svga device surface flags, quality level and multisample pattern. Signed-off-by:
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Deepak Rawat authored
Since svga device introduced new 64bit SVGA3dSurfaceAllFlags, vmwgfx now stores the surface flags internally as SVGA3dSurfaceAllFlags. For legacy surface define commands, only lower 32-bit is used. Signed-off-by:
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Deepak Rawat authored
SVGA device added new command SVGA3dCmdDefineGBSurface_v3 which allows 64-bit SVGA3dSurfaceAllFlags. This commit adds support for SVGA3dCmdDefineGBSurface_v3 command in vmwgfx. Signed-off-by:
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Deepak Rawat authored
A boolean flag in device private structure to specify if the device support SM4_1. Signed-off-by:
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Neha Bhende authored
A new command to support Intra-Surface-Copy. Signed-off-by:
Neha Bhende <bhenden@vmware.com> Reviewed-by:
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Neha Bhende authored
The device exposes a new capability register. Add support for it. Signed-off-by:
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git://linux-arm.org/linux-ldDave Airlie authored
"mali-dp driver changes for drm-next, includes the driver implementation for writeback, improvements for power management handling in the driver and a debugfs entry for reporting possible internal errors. Please pull at your earliest convenience. Boris Brezillon is also interested in this pull as he is going to change slightly the parameter for the writeback connector's atomic_commit() and he needs to fix the mali-dp driver in his series." Signed-off-by:
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git://anongit.freedesktop.org/drm/drm-miscDave Airlie authored
drm-misc-next for 4.19: UAPI Changes: v3d: add fourcc modicfier for fourcc for the Broadcom UIF format (Eric Anholt) Cross-subsystem Changes: console/fbcon: Add support for deferred console takeover (Hans de Goede) Core Changes: dma-fence clean up, improvements and docs (Daniel Vetter) add mask function for crtc, plane, encoder and connector DRM objects(Ville Syrjälä) Driver Changes: pl111: add Nomadik LCDC variant (Linus Walleij) Signed-off-by:
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- 05 Jul, 2018 6 commits
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git://people.freedesktop.org/~thomash/linuxDave Airlie authored
A patchset worked out together with Peter Zijlstra. Ingo is OK with taking it through the DRM tree: This is a small fallout from a work to allow batching WW mutex locks and unlocks. Our Wound-Wait mutexes actually don't use the Wound-Wait algorithm but the Wait-Die algorithm. One could perhaps rename those mutexes tree-wide to "Wait-Die mutexes" or "Deadlock Avoidance mutexes". Another approach suggested here is to implement also the "Wound-Wait" algorithm as a per-WW-class choice, as it has advantages in some cases. See for example http://www.mathcs.emory.edu/~cheung/Courses/554/Syllabus/8-recv+serial/deadlock-compare.html Now Wound-Wait is a preemptive algorithm, and the preemption is implemented using a lazy scheme: If a wounded transaction is about to go to sleep on a contended WW mutex, we return -EDEADLK. That is sufficient for deadlock prevention. Since with WW mutexes we also require the aborted transaction to sleep waiting to lock the WW mutex it was aborted on, this choice also provides a suitable WW mutex to sleep on. If we were to return -EDEADLK on the first WW mutex lock after the transaction was wounded whether the WW mutex was contended or not, the transaction might frequently be restarted without a wait, which is far from optimal. Note also that with the lazy preemption scheme, contrary to Wait-Die there will be no rollbacks on lock contention of locks held by a transaction that has completed its locking sequence. The modeset locks are then changed from Wait-Die to Wound-Wait since the typical locking pattern of those locks very well matches the criterion for a substantial reduction in the number of rollbacks. For reservation objects, the benefit is more unclear at this point and they remain using Wait-Die. Signed-off-by:
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Darren Powell authored
Signed-off-by:
Darren Powell <darren.powell@amd.com> Reviewed-by:
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Sonny Jiang authored
Signed-off-by:
Sonny Jiang <sonny.jiang@amd.com> Acked-by:
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Mikita Lipski authored
[why] HDMI 2.0 fails to validate 4K@60 timing with 10 bpc [how] Adding a helper function that would verify if the display depth assigned would pass a bandwidth validation. Drop the display depth by one level till calculated pixel clk is lower than maximum TMDS clk. Bugzilla: https://bugs.freedesktop.org/106959Signed-off-by:
Mikita Lipski <mikita.lipski@amd.com> Tested-by:
Mike Lothian <mike@fireburn.co.uk> Reviewed-by:
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Mikita Lipski authored
[why] HDMI EDID's VSDB contains spectial timings for specifically YCbCr 4:2:0 colour space. In those cases we need to verify if the mode provided is one of the special ones has to use YCbCr 4:2:0 pixel encoding for display info. [how] Verify if the mode is using specific ycbcr420 colour space with the help of DRM helper function and assign the mode to use ycbcr420 pixel encoding. Signed-off-by:
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Darren Powell authored
Eliminating the warnings produced by sphinx when processing the sphinx comments in amdgpu_device.c & amdgpu_mn.c Signed-off-by:
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