- 25 Oct, 2021 1 commit
-
-
Bjorn Andersson authored
The introduction of __qcom_scm_set_boot_addr_mc() relies on cpu_logical_map() and MPIDR_AFFINITY_LEVEL() from smp_plat.h, but only ARM and ARM64 has this include file, so the introduction of this dependency broke compile testing on e.g. x86_64. Make the inclusion of smp_plat.h and the affected function depend on ARM || ARM64 to allow the code to still be compiled. Fixes: 55845f46 ("firmware: qcom: scm: Add support for MC boot address API") Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211025025816.2937465-1-bjorn.andersson@linaro.org
-
- 24 Oct, 2021 11 commits
-
-
Wan Jiabing authored
Fix following coccicheck warning: ./drivers/soc/qcom/smp2p.c:501:1-33: WARNING: Function for_each_available_child_of_node should have of_node_put() before goto Early exits from for_each_available_child_of_node should decrement the node reference counter. Signed-off-by:
Wan Jiabing <wanjiabing@vivo.com> Signed-off-by:
-
Wan Jiabing authored
Fix following coccicheck warning: ./drivers/soc/qcom/apr.c:485:1-23: WARNING: Function for_each_child_of_node should have of_node_put() before return Early exits from for_each_child_of_node should decrement the node reference counter. Fixes: 83473566 ("soc: qcom: apr: Add avs/audio tracking functionality") Signed-off-by:
-
Maulik Shah authored
Client votes starts at 0x20 offset. Correct the offset. Reported-and-suggested-by:
Shawn Guo <shawn.guo@linaro.org> Fixes: 1d772469 ("soc: qcom: Add Sleep stats driver") Signed-off-by:
Maulik Shah <mkshah@codeaurora.org> Reviewed-by:
-
Dmitry Baryshkov authored
The sm8350_mxc's domain description incorrectly references sm8150_mmcx_ao as a peer instead of sm8350_mxc_ao. Correct this typo. Fixes: 639c8562 ("soc: qcom: rpmhpd: Add SM8350 power domains") Cc: Vinod Koul <vkoul@kernel.org> Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
-
Stephan Gerhold authored
Since MSM8916 is an ARM v8 64-bit SoC the CPU cores are normally booted using "psci" or "spin-table". Unfortunately, some devices come with signed 32-bit-only firmware without ARM64 and PSCI support. This setup is easy to support since it's very similar to older 32-bit only Qualcomm SoCs (e.g. MSM8226) and only requires adding a few new definitions to already existing drivers. Document the qcom,msm8916-smp enable-method. It is actually just an alias of qcom,msm8226-smp since it should be implemented identically. The enable-method is only valid on ARM32 and must not be used on ARM64. Signed-off-by:
Stephan Gerhold <stephan@gerhold.net> Reviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
-
Stephan Gerhold authored
Unfortunately, some MSM8916 devices have signed firmware without ARM64 and PSCI support and can therefore only boot ARM32 Linux. The ARM Cortex-A53 cores should be actually booted exactly like the Cortex-A7 cores on MSM8226, so just add an alias for the existing code. Signed-off-by:
-
Stephan Gerhold authored
It looks like the old QCOM_SCM_BOOT_SET_ADDR API is broken on some MSM8916 firmware versions that implement the newer SMC32 calling convention. It just returns -EINVAL no matter which arguments are being passed. This does not cause any problems downstream because it first tries to use the new multi-cluster API replacement which is working fine. Implement support for the multi-cluster variant of the SCM call by attempting it first but still fallback to the old call in case of an error. Also, to be absolutely sure only use the multi-cluster variant with the SMC calling convention since older platforms should not need this. Signed-off-by:
-
Lina Iyer authored
Add SPM register information and initialization values for QCOM 8916 SoC. Link: https://lore.kernel.org/linux-arm-msm/1429314549-6730-5-git-send-email-lina.iyer@linaro.org/Signed-off-by:
Lina Iyer <lina.iyer@linaro.org> [stephan: rebase patch and fix conflicts] Signed-off-by:
-
Stephan Gerhold authored
Document the qcom,msm8916-saw2-v3.0-cpu compatible that is needed for cpuidle for MSM8916 on some devices with signed firmware which is only capable of booting ARM32 kernels without PSCI. Acked-by:
-
Bjorn Andersson authored
Add PM8150C and SMB2351 to the list of known PMIC models. Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org> Link: https://lore.kernel.org/r/20211005024025.2037810-1-bjorn.andersson@linaro.org
-
Guru Das Srinagesh authored
Since __qcom_scm_is_call_available() returns bool, have it return false instead of -EINVAL if an invalid SMC convention is detected. This fixes the Smatch static checker warning: drivers/firmware/qcom_scm.c:255 __qcom_scm_is_call_available() warn: signedness bug returning '(-22)' Fixes: 9d11af8b ("firmware: qcom_scm: Make __qcom_scm_is_call_available() return bool") Reported-by:
Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
Guru Das Srinagesh <quic_gurus@quicinc.com> Reviewed-by:
Stephen Boyd <swboyd@chromium.org> Signed-off-by:
-
- 17 Oct, 2021 1 commit
-
-
Chris Lew authored
This patch adds feature negotiation and ssr ack feature between local host and remote processor. Local host can negotiate on common features supported with remote processor. When ssr ack feature bit is set, the remote processor will tell local host when it is reinitialized. All clients registered for falling edge interrupts will be notified when the smp2p entries are cleared for ssr. Signed-off-by:
Chris Lew <clew@codeaurora.org> Signed-off-by:
Deepak Kumar Singh <deesin@codeaurora.org> Reviewed-by:
-
- 16 Oct, 2021 3 commits
-
-
Mahesh Sivasubramanian authored
Let's add a driver to read the stats from remote processor and export to debugfs. The driver creates "qcom_sleep_stats" directory in debugfs and adds files for various low power mode available. Below is sample output with command cat /sys/kernel/debug/qcom_sleep_stats/ddr count = 0 Last Entered At = 0 Last Exited At = 0 Accumulated Duration = 0 Signed-off-by:
Mahesh Sivasubramanian <msivasub@codeaurora.org> Signed-off-by:
Lina Iyer <ilina@codeaurora.org> [mkshah: add subsystem sleep stats, create one file for each stat] Signed-off-by:
-
Mahesh Sivasubramanian authored
Add device binding documentation for Qualcomm Technologies, Inc. (QTI) Sleep stats driver. The driver is used for displaying Sleep statistic maintained by Always On Processor or Resource Power Manager. Cc: devicetree@vger.kernel.org Signed-off-by:
-
Dmitry Baryshkov authored
Add IDs for PMK8001 and PMI8996. They also fall in the list of 'duplicated' IDs, where the same index was used for multiple chips. Fixes: 7fda2b0b ("soc: qcom: socinfo: import PMIC IDs from pmic-spmi") Signed-off-by:
-
- 15 Oct, 2021 4 commits
-
-
Bjorn Andersson authored
The general expectation is that powering on a power-domain should make the power domain deliver some power, and if a specific performance state is needed further requests has to be made. But in contrast with other power-domain implementations (e.g. rpmpd) the RPMh does not have an interface to enable the power, so the driver has to vote for a particular corner (performance level) in rpmh_power_on(). But the corner is never initialized, so a typical request to simply enable the power domain would not actually turn on the hardware. Further more, when no more clients vote for a performance state (i.e. the aggregated vote is 0) the power domain would be turned off. Fix both of these issues by always voting for a corner with non-zero value, when the power domain is enabled. The tracking of the lowest non-zero corner is performed to handle the corner case if there's ever a domain with a non-zero lowest corner, in which case both rpmh_power_on() and rpmh_rpmhpd_set_performance_state() would be allowed to use this lowest corner. Fixes: 279b7e8a ("soc: qcom: rpmhpd: Add RPMh power domain driver") Signed-off-by:
-
Bjorn Andersson authored
Practically all modern Qualcomm platforms has a single reserved-memory region for SMEM. So rather than having to describe SMEM in the form of a node with a reference to a reserved-memory node, allow the SMEM device to be instantiated directly from the reserved-memory node. The current means of falling back to dereferencing the "memory-region" is kept as a fallback, if it's determined that the SMEM node is a reserved-memory node. The "qcom,smem" compatible is added to the reserved_mem_matches list, to allow the reserved-memory device to be probed. In order to retain the readability of the code, the resolution of resources is split from the actual ioremapping. Signed-off-by:
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Link: https://lore.kernel.org/r/20210930182111.57353-4-bjorn.andersson@linaro.org
-
Bjorn Andersson authored
In the olden days the Qualcomm shared memory (SMEM) region consisted of multiple chunks of memory, so SMEM was described as a standalone node with references to its various memory regions. But practically all modern Qualcomm platforms has a single reserved memory region used for SMEM. So rather than having to use two nodes to describe the one SMEM region, update the binding to allow the reserved-memory region alone to describe SMEM. The olden format is preserved as valid, as this is widely used already. Signed-off-by:
-
Bjorn Andersson authored
The Qualcomm SMEM binding always depended on a reference to a SRAM node of compatible "qcom,rpm-msg-ram", document this as part of the SRAM binding. The SRAM is consumed as a whole and not split up using subnodes, so properties related to this are not required. Signed-off-by:
-
- 28 Sep, 2021 6 commits
-
-
Bjorn Andersson authored
v5.15-rc1 + 20210927135559.738-[23456]-srinivas.kandagatla@linaro.org This immutable branch is based on v5.15-rc1 and contains the following patches extending the existig APR driver to also implement GPR: 20210927135559.738-2-srinivas.kandagatla@linaro.org 20210927135559.738-3-srinivas.kandagatla@linaro.org 20210927135559.738-4-srinivas.kandagatla@linaro.org 20210927135559.738-5-srinivas.kandagatla@linaro.org 20210927135559.738-6-srinivas.kandagatla@linaro.org
-
Srinivas Kandagatla authored
Qualcomm Generic Packet router aka GPR is the IPC mechanism found in AudioReach next generation signal processing framework to perform command and response messages between various processors. GPR has concepts of static and dynamic port, all static services like APM (Audio Processing Manager), PRM (Proxy resource manager) have fixed port numbers where as dynamic services like graphs have dynamic port numbers which are allocated at runtime. All GPR packet messages will have source and destination domain and port along with opcode and payload. Signed-off-by:
Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by:
Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by:
-
Srinivas Kandagatla authored
Qualcomm Generic Packet router aka GPR is the IPC mechanism found in AudioReach next generation signal processing framework to perform command and response messages between various processors. GPR has concepts of static and dynamic port, all static services like APM (Audio Processing Manager), PRM (Proxy resource manager) have fixed port numbers where as dynamic services like graphs have dynamic port numbers which are allocated at runtime. All GPR packet messages will have source and destination domain and port along with opcode and payload. This support is added using existing APR driver to reuse most of the code. Signed-off-by:
-
Srinivas Kandagatla authored
APR and other packet routers like GPR are pretty much same and interact with other drivers in similar way. Ex: GPR ports can be considered as APR services, only difference is they are allocated dynamically. Other difference is packet layout, which should not matter with the apis abstracted. Apart from this the rest of the functionality is pretty much identical across APR and GPR. Make the apr code more reusable by abstracting it service level, rather than device level so that we do not need to write new drivers for other new packet routers like GPR. This patch is in preparation to add GPR support to this driver. Signed-off-by:
-
Srinivas Kandagatla authored
replace usage of qcom,apr-domain property with qcom,domain property so that bindings and driver can be reused. Signed-off-by:
-
Srinivas Kandagatla authored
Convert APR bindings to yaml format so that we could add new bindings support. All the dsp services bindings are now part of apr bindings instead of adding them to audio bindings. Signed-off-by:
-
- 27 Sep, 2021 4 commits
-
-
Sibi Sankar authored
Delete unused power-domain definitions exposed by AOSS QMP. Signed-off-by:
Sibi Sankar <sibis@codeaurora.org> Reviewed-by:
Matthias Kaehlcke <mka@chromium.org> Signed-off-by:
-
Sibi Sankar authored
Remove the unused aoss-qmp header from the list of includes. Signed-off-by:
-
Sibi Sankar authored
Strip out the load state power-domain support from the driver since the low power mode signalling for the co-processors is now accessible through the direct qmp message send interface. Signed-off-by:
-
Sibi Sankar authored
The power-domains exposed by AOSS QMP node are used to notify the Always on Subsystem (AOSS) that a particular co-processor is up/down. These co-processors enter low-power modes independent to that of the application processor and their states are expected to remain unaltered across system suspend/resume cycles. To achieve this behavior let's drop the load power-domain and replace them with generic qmp_send interface instead. Signed-off-by:
-
- 23 Sep, 2021 1 commit
-
-
Deepak Kumar Singh authored
Remote susbsystems notify fatal crash through smp2p interrupt. When remoteproc crashes it can cause soc to come out of low power state and may not allow again to enter in low power state until crash is handled. Mark smp2p interrupt wakeup capable so that interrupt handler is executed and remoteproc crash can be handled in system resume path. This patch marks interrupt wakeup capable but keeps wakeup disabled by default. User space can enable it based on its requirement for wakeup from suspend. Signed-off-by:
-
- 21 Sep, 2021 9 commits
-
-
Bjorn Andersson authored
-
Konrad Dybcio authored
Add compatible and constants for the power domains exposed by the RPMH in the Qualcomm SM6350 platform. Acked-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by:
Konrad Dybcio <konrad.dybcio@somainline.org> Acked-by:
-
Konrad Dybcio authored
Add SM6350 AOSS QMP compatible to the list of possible bindings. Signed-off-by:
-
Naina Mehta authored
Disable MMUHWT retention for SC7280 as done for other platforms to avoid more power burn. Fixes: f6a07be6 ("soc: qcom: llcc: Add configuration data for SC7280") Signed-off-by:
Naina Mehta <nainmeht@codeaurora.org> Signed-off-by:
Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Signed-off-by:
-
Shawn Guo authored
Add compatible for QCM2290 SoC support. Signed-off-by:
-
Shawn Guo authored
Add compatible for the RPM on Qualcomm QCM2290 SoC. Signed-off-by:
-
Vladimir Lypak authored
Add compatible for SCM on MSM8953. Signed-off-by:
Vladimir Lypak <junak.pub@gmail.com> Signed-off-by:
Sireesh Kodali <sireeshkodali@protonmail.com> Signed-off-by:
-
Vladimir Lypak authored
SCM driver on MSM8953 requires 3 clocks. Signed-off-by:
-
Len Baker authored
strcpy() performs no bounds checking on the destination buffer. This could result in linear overflows beyond the end of the buffer, leading to all kinds of misbehaviors. The safe replacement is strscpy(). This is a previous step in the path to remove the strcpy() function entirely from the kernel. Signed-off-by:
Len Baker <len.baker@gmx.com> Signed-off-by:
-
