- 29 May, 2017 14 commits
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Linus Walleij authored
Fix compile errors due to missing OF. Cc: Paul Cercueil <paul@crapouillou.net> Reported-by:
Randy Dunlap <rdunlap@infradead.org> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Neil Armstrong authored
The Amlogic Meson GXL SoCs embeds an 10/100 Ethernet PHY, this patchs enables the Link and Activity LEDs signals. Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Reviewed-by:
Jerome Brunet <jbrunet@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Neil Armstrong authored
Add the AO and EE domain CEC pins for the Amlogic Meson GXL SoCs. Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Reviewed-by:
Jerome Brunet <jbrunet@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Neil Armstrong authored
Add the AO and EE domain CEC pins for the Amlogic Meson GXBB SoCs. Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Reviewed-by:
Jerome Brunet <jbrunet@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Neil Armstrong authored
The AO SPDIF pins were incorrectly defined with the EE pin offset. Fixes: b840d649 ("pinctrl: meson: gxl: add spdif output pins") Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Reviewed-by:
Jerome Brunet <jbrunet@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Neil Armstrong authored
The AO I2S pins were incorrectly defined with the EE pin offset. Fixes: 2899adf0 ("pinctrl: meson: gxl: add i2s output pins") Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Reviewed-by:
Jerome Brunet <jbrunet@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Neil Armstrong authored
GPIODV_18 entry was missing in the original driver push. Fixes: 468c234f ("pinctrl: amlogic: Add support for Amlogic Meson GXBB SoC") Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Reviewed-by:
Jerome Brunet <jbrunet@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Neil Armstrong authored
GPIODV_18 entry was missing in the original driver push. Fixes: 0f15f500 ("pinctrl: meson: Add GXL pinctrl definitions") Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Reviewed-by:
Jerome Brunet <jbrunet@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Paul Gortmaker authored
Fixups here tend to be more of a conglomerate of some of the other repeated/systematic ones we've seen in the earlier pinctrl cleanups. We remove module.h from code that isn't doing anything modular at all; if they have __init sections, then replace it with init.h One driver has a .remove that would be dispatched on module_exit, and as that code is essentially orphaned, so we remove it. In case anyone was previously doing the (pointless) unbind to get to that function, we disable unbind for this one driver as well. A couple bool drivers (hence non-modular) are converted over to to builtin_platform_driver(). Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information was (or is now) contained at the top of the file in the comments. Cc: Eric Anholt <eric@anholt.net> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Jon Mason <jonmason@broadcom.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Ray Jui <rjui@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Cc: Sherman Yin <syin@broadcom.com> Cc: bcm-kernel-feedback-list@broadcom.com Cc: linux-gpio@vger.kernel.org Cc: linux-rpi-kernel@lists.infradead.org Signed-off-by:
Paul Gortmaker <paul.gortmaker@windriver.com> Tested-by:
Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Paul Gortmaker authored
None of the Kconfigs for any of these drivers are tristate, meaning that they currently are not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the drivers there is no doubt they are builtin-only. All drivers get similar changes, so they are handled in batch. We remove module.h from code that isn't doing anything modular at all; if they have __init sections, then replace it with init.h. A couple drivers have module_exit() code that is essentially orphaned, and so we remove that. Quite a few bool drivers (hence non-modular) are converted over to to builtin_platform_driver(). Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information was (or is now) contained at the top of the file in the comments. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Pritesh Raithatha <praithatha@nvidia.com> Cc: Ashwini Ghuge <aghuge@nvidia.com> Cc: linux-gpio@vger.kernel.org Cc: linux-tegra@vger.kernel.org Signed-off-by:
Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Masahiro Yamada authored
Use of_device_get_match_data() instead of of_match_device(). It allows us to remove the forward declaration of pcs_of_match. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Shawn Guo authored
There are a couple of issues with group_desc initialization in function zx_pinctrl_build_state(). - num_pins is not initialized and remains zero. - pins shouldn't be initialized with a pointer to variable in the stack. With them fixed, pin_request() in pinmux_enable_setting() can be invoked correctly. Signed-off-by:
Shawn Guo <shawn.guo@linaro.org> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Neil Armstrong authored
The SPICC controller has dedicated SPI pins, this patchs add the pins definition in the GXBB pinctrl driver Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Neil Armstrong authored
The SPICC controller has dedicated SPI pins, this patchs add the pins definition in the GXL pinctrl driver. Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 23 May, 2017 18 commits
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Chen-Yu Tsai authored
We use well known standard names for functions that have name, such as I2C, SPI, SPDIF, etc.. Fix the function name of SPDIF, which was named OWA (One Wire Audio) based on Allwinner datasheets. Fixes: 4730f33f ("pinctrl: sunxi: add allwinner A83T PIO controller support") Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Gregory CLEMENT authored
There was no entry for the mvebu pinctrl drivers. As they are tightly linked to the SoCs and there is a lot of common code to support the various pinctrl of each SoCs, then add a new entry for the mvebu maintainers. Reviewed-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Mauro Carvalho Chehab authored
Each text file under Documentation follows a different format. Some doesn't even have titles! Change its representation to follow the adopted standard, using ReST markups for it to be parseable by Sphinx. This document is almost following the standard stile. There are only two things to adjust on it: - promote the level of the document title; - mark literal blocks as such. Signed-off-by:
Mauro Carvalho Chehab <mchehab@s-opensource.com> [Fix some indentations] Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
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Sebastian Reichel authored
The comment does not match the driver, which actually supports automatic assignment. Fix this by updating the comment. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Sebastian Reichel authored
The driver supports using mcp23xxx as interrupt controller, so let's drop all comments stating otherwise. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Sebastian Reichel authored
Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Sebastian Reichel authored
This moves irq property handling from spi/i2c specific code into the generic mcp23s08_probe_one. This is possible because the device properties are named equally. As a side-effect this drops support for setting the properties via pdata, which has no mainline users. If boardcode wants to enable the chip as interrupt controller it can attach the device properties instead. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Sebastian Reichel authored
Simplify spi pdata handling, so that it uses pdata when available and falls back to reading device properties otherwise. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Sebastian Reichel authored
Simplify i2c pdata handling, so that it uses pdata when available and falls back to reading device properties otherwise. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Sebastian Reichel authored
Switching to devm_gpiochip_add_data simplifies the driver's cleanup routine and safes a few loc. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Sebastian Reichel authored
Let's remove a few lines of code by using managed memory for mcp variable. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Sebastian Reichel authored
i2c-core and spi-core already assign the irq, so we can drop the additional call from the mcp driver. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Sebastian Reichel authored
The driver compiles & works perfectly fine without OF_GPIO on x86, so lets drop the dependency. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Sebastian Reichel authored
Instead of using custom caching, this switches to regmap based caching. Before the conversion the debugfs file used uncached values, so that it was easily possible to see power-loss related problems. The new code will check and recover at this place. The patch will also ensure, that irqs are not cleared by checking register status in debugfs. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Sebastian Reichel authored
mcp23s08 support configuration of the pullups using the pinconf framework. This removes the custom pullup configuration from platform data, which has no upstream users. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Sebastian Reichel authored
mcp23xxx device have configurable 100k pullup resistors. This adds support for enabling them using pinctrl's pinconf interface. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Tested-by:
Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Sebastian Reichel authored
This moves the mcp23s08 driver from gpio to pinctrl. Actual pinctrl support for configuration of the pull-up resistors follows in its own patch. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Acked-by:
Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 22 May, 2017 8 commits
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Linus Walleij authored
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Paul Cercueil authored
All the drivers for the various hardware elements of the jz4740 SoC have been modified to use the pinctrl framework for their pin configuration needs. As such, this platform code is now unused and can be deleted. Signed-off-by:
Paul Cercueil <paul@crapouillou.net> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Paul Cercueil authored
We set the pin configuration for the jz4780-nand and jz4780-uart drivers. Signed-off-by:
Paul Cercueil <paul@crapouillou.net> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Paul Cercueil authored
We set the pin configuration for the jz4740-nand, jz4740-mmc, jz4740-fb, jz4740-pwm and jz4740-uart drivers. This will permit those drivers to be cleaned out of the custom GPIO code that they currently use. Signed-off-by:
Paul Cercueil <paul@crapouillou.net> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Paul Cercueil authored
For a description of the devicetree node, please read Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt For a description of the gpio devicetree nodes, please read Documentation/devicetree/bindings/gpio/ingenic,gpio.txt Signed-off-by:
Paul Cercueil <paul@crapouillou.net> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Paul Cercueil authored
For a description of the pinctrl devicetree node, please read Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt For a description of the gpio devicetree nodes, please read Documentation/devicetree/bindings/gpio/ingenic,gpio.txt Signed-off-by:
Paul Cercueil <paul@crapouillou.net> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Paul Cercueil authored
There is a pinctrl driver for each of the Ingenic SoCs supported by the upstream Linux kernel. In order to switch away from the old GPIO platform code, we now enable the pinctrl drivers by default for the Ingenic SoCs. Signed-off-by:
Paul Cercueil <paul@crapouillou.net> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Paul Cercueil authored
Before, this NAND driver would set itself the configuration of the chip-select pins for the various NAND banks. Now that the JZ4740 and similar SoCs have a pinctrl driver, we rely on the pins being properly configured before the driver probes. Signed-off-by:
Paul Cercueil <paul@crapouillou.net> Acked-by:
Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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