1. 14 Apr, 2015 1 commit
    • Thor Thayer's avatar
      spi: dw: Fix dynamic speed change. · c5298dc5
      Thor Thayer authored
      commit 0a8727e6 upstream.
      
      An IOCTL call that calls spi_setup() and then dw_spi_setup() will
      overwrite the persisted last transfer speed. On each transfer, the
      SPI speed is compared to the last transfer speed to determine if the
      clock divider registers need to be updated (did the speed change?).
      This bug was observed with the spidev driver using spi-config to
      update the max transfer speed.
      
      This fix: Don't overwrite the persisted last transaction clock speed
      when updating the SPI parameters in dw_spi_setup(). On the next
      transaction, the new speed won't match the persisted last speed
      and the hardware registers will be updated.
      On initialization, the persisted last transaction clock
      speed will be 0 but will be updated after the first SPI
      transaction.
      
      Move zeroed clock divider check into clock change test because
      chip->clk_div is zero on startup and would cause a divide-by-zero
      error. The calculation was wrong as well (can't support odd #).
      Reported-by: default avatarVlastimil Setka <setka@vsis.cz>
      Signed-off-by: default avatarVlastimil Setka <setka@vsis.cz>
      Signed-off-by: default avatarThor Thayer <tthayer@opensource.altera.com>
      Signed-off-by: default avatarMark Brown <broonie@kernel.org>
      Signed-off-by: default avatarZefan Li <lizefan@huawei.com>
      c5298dc5
  2. 02 Feb, 2015 39 commits