- 24 Oct, 2010 40 commits
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Alexander Graf authored
The different ways of flusing shadow ptes have their own debug prints which use stupid old printk. Let's move them to tracepoints, making them easier available, faster and possible to activate on demand Signed-off-by:Alexander Graf <agraf@suse.de>
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Alexander Graf authored
After a flush the sid map contained lots of entries with 0 for their gvsid and hvsid value. Unfortunately, 0 can be a real value the guest searches for when looking up a vsid so it would incorrectly find the host's 0 hvsid mapping which doesn't belong to our sid space. So let's also check for the valid bit that indicated that the sid we're looking at actually contains useful data. Signed-off-by: -
Alexander Graf authored
This patch moves the SPTE flush debug printk over to tracepoints. Signed-off-by: -
Alexander Graf authored
This patch moves the generic mmu map debugging over to tracepoints. Signed-off-by: -
Alexander Graf authored
This patch moves Book3s MMU debugging over to tracepoints. Signed-off-by: -
Alexander Graf authored
We have a debug printk on every exit that is usually #ifdef'ed out. Using tracepoints makes a lot more sense here though, as they can be dynamically enabled. This patch converts the most commonly used debug printks of EXIT_DEBUG to tracepoints. Signed-off-by: -
Takuya Yoshikawa authored
The following patch commit 57ce1659316f4ca298919649f9b1b55862ac3826 KVM: x86: In DM_LOWEST, only deliver interrupts to vcpus with enabled LAPIC's ignored the fact that kvm_irq_delivery_to_apic() was also used by ia64. We define kvm_lapic_enabled() to fix a compile error caused by this. This will have the same effect as reverting the problematic patch for ia64. Signed-off-by:
Takuya Yoshikawa <yoshikawa.takuya@oss.ntt.co.jp> Signed-off-by:
Avi Kivity <avi@redhat.com>
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Xiao Guangrong authored
The audit is very high overhead, so we need lower the frequency to assure the guest is running. Signed-off-by:
Xiao Guangrong <xiaoguangrong@cn.fujitsu.com> Signed-off-by:
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Xiao Guangrong authored
Both audit_mappings() and audit_sptes_have_rmaps() need to walk vcpu's page table, so we can do these checking in a spte walking Signed-off-by:
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Xiao Guangrong authored
Both audit_rmap() and audit_write_protection() need to walk all active sp, so we can do these checking in a sp walking Signed-off-by:
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Xiao Guangrong authored
Move the audit code from arch/x86/kvm/mmu.c to arch/x86/kvm/mmu_audit.c Signed-off-by:
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Xiao Guangrong authored
Add a r/w module parameter named 'mmu_audit', it can control audit enable/disable: enable: echo 1 > /sys/module/kvm/parameters/mmu_audit disable: echo 0 > /sys/module/kvm/parameters/mmu_audit This patch not change the logic Signed-off-by:
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Jes Sorensen authored
MSR_K7_CLK_CTL is a no longer documented MSR, which is only relevant on said old AMD CPU models. This change returns the expected value, which the Linux kernel is expecting to avoid writing back the MSR, plus it ignores all writes to the MSR. Signed-off-by:
Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by:
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Avi Kivity authored
ICW is not a full reset, instead it resets a limited number of registers in the PIC. Change ICW1 emulation to only reset those registers. Signed-off-by: -
Avi Kivity authored
x86_emulate_insn() is full of things like if (rc != X86EMUL_CONTINUE) goto done; break; consolidate all of those at the end of the switch statement. Signed-off-by: -
Avi Kivity authored
These are all undefined. Signed-off-by: -
Avi Kivity authored
Signed-off-by: -
Avi Kivity authored
It is read/only; restoring it only results in annoying messages. Signed-off-by: -
Marcelo Tosatti authored
Otherwise EFER_LMA bit is retained across a SIPI reset. Fixes guest cpu onlining. Signed-off-by:
Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by:
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Marcelo Tosatti authored
Since commit aad82703 no mmu reinitialization is performed via init_vmcb. Zero vcpu->arch.cr0 and pass the reset value as a parameter to kvm_set_cr0. Signed-off-by:
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Avi Kivity authored
out = write, in = read, not the other way round. Signed-off-by: -
Xiao Guangrong authored
Nothing is checked in count_rmaps(), so remove it Signed-off-by:
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Xiao Guangrong authored
There is a bugs in this function, we call gfn_to_pfn() and kvm_mmu_gva_to_gpa_read() in atomic context(kvm_mmu_audit() is called under the spinlock(mmu_lock)'s protection). This patch fix it by: - introduce gfn_to_pfn_atomic instead of gfn_to_pfn - get the mapping gfn from kvm_mmu_page_get_gfn() And it adds 'notrap' ptes check in unsync/direct sps Signed-off-by:
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Xiao Guangrong authored
The audit code reports some sp not write protected in current code, it's just the bug in audit_write_protection(), since: - the invalid sp not need write protected - using uninitialize local variable('gfn') - call kvm_mmu_audit() out of mmu_lock's protection Signed-off-by: -
Xiao Guangrong authored
The read-only spte also has reverse mapping, so fix the code to check them, also modify the function name to fit its doing Signed-off-by:
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Xiao Guangrong authored
fix: arch/x86/kvm/mmu.c: In function ‘kvm_mmu_unprotect_page’: arch/x86/kvm/mmu.c:1741: warning: format ‘%lx’ expects type ‘long unsigned int’, but argument 3 has type ‘gfn_t’ arch/x86/kvm/mmu.c:1745: warning: format ‘%lx’ expects type ‘long unsigned int’, but argument 3 has type ‘gfn_t’ arch/x86/kvm/mmu.c: In function ‘mmu_unshadow’: arch/x86/kvm/mmu.c:1761: warning: format ‘%lx’ expects type ‘long unsigned int’, but argument 3 has type ‘gfn_t’ arch/x86/kvm/mmu.c: In function ‘set_spte’: arch/x86/kvm/mmu.c:2005: warning: format ‘%lx’ expects type ‘long unsigned int’, but argument 3 has type ‘gfn_t’ arch/x86/kvm/mmu.c: In function ‘mmu_set_spte’: arch/x86/kvm/mmu.c:2033: warning: format ‘%lx’ expects type ‘long unsigned int’, but argument 7 has type ‘gfn_t’ Signed-off-by:
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Jason Wang authored
Pit interrupt injection was done by workqueue, so no need to check pending pit timer in vcpu thread which could lead unnecessary unblocking of vcpu. Signed-off-by:
Jason Wang <jasowang@redhat.com> Signed-off-by:
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Alexander Graf authored
When CONFIG_KVM_GUEST is selected, but CONFIG_KVM is not, we were missing some defines in asm-offsets.c and included too many headers at other places. This patch makes above configuration work. Reported-by:
Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by:
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Avi Kivity authored
The ALU opcode block is very regular; introduce D6ALU() to define decode flags for 6 instructions at a time. Suggested by Paolo Bonzini. Signed-off-by:
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Avi Kivity authored
Use do_div() instead. Signed-off-by:
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Avi Kivity authored
Signed-off-by:
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Avi Kivity authored
Like DIV and IDIV. Signed-off-by:
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Avi Kivity authored
Use the new byte/word dual opcode decode. Signed-off-by:
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Avi Kivity authored
Use the new byte/word dual opcode decode. Signed-off-by:
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Avi Kivity authored
Use the new byte/word dual opcode decode. Signed-off-by:
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Avi Kivity authored
Use the new byte/word dual opcode decode. Signed-off-by:
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Avi Kivity authored
Use the new byte/word dual opcode decode. Signed-off-by:
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Avi Kivity authored
Use the new byte/word dual opcode decode. Signed-off-by:
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Avi Kivity authored
Use the new byte/word dual opcode decode. Signed-off-by:
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Avi Kivity authored
Many x86 instructions come in byte and word variants distinguished with bit 0 of the opcode. Add macros to aid in defining them. Signed-off-by:
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