- 03 May, 2016 5 commits
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Fabio Estevam authored
The following build warnings are seen when building with 'W=1' option: Warning (unit_address_vs_reg): Node /soc/aips-bus@02000000/anatop@020c8000/regulator-1p1@110 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/aips-bus@02000000/anatop@020c8000/regulator-3p0@120 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/aips-bus@02000000/anatop@020c8000/regulator-2p5@130 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/aips-bus@02000000/anatop@020c8000/regulator-vddcore@140 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/aips-bus@02000000/anatop@020c8000/regulator-vddpu@140 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/aips-bus@02000000/anatop@020c8000/regulator-vddsoc@140 has a unit name, but no reg property Fix them by removing the unneeded unit-addresses. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Marcel Ziswiler authored
Add parallel LCD display support for the EDT ET057090DHU 5.7" LCD TFT panel. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
imx6sx-sdb has custom operating points entries because it has one power supply that drives both VDDARM_IN and VDDSOC_IN. As per the MX6UL datasheet we have the following minimum voltages for 198 MHz operation (after adding the 25mV margin value): VDDARM_IN = 0.975 V VDDSOC_IN = 1.175 V So use 1.175V for the 198MHz operation. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
mtdparts is passed from command line, so there is no need to have a default partitioning in device-tree. Suggested-by: Marek Vasut <marex@denx.de> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
Add initial support for imx6ul pico hobbit board. For information about this board, please visit: http://www.wandboard.org/images/hobbit/hobbitboard-imx6ul-reva1.pdfSigned-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 27 Apr, 2016 2 commits
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Fabio Estevam authored
Using "IMX6QDL_CLK_CKO" for the clock is easier to read instead of the hardcoded clock number. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Sergio Prado authored
Embest MarS Board [1] is a multi-core platform based on Freescale i.MX6 Cortex-A9 Dual Core, running up to 1GHz with 1 GB of RAM, 4GB of eMMC and with a 4MB SPI flash. [1] http://www.embest-tech.com/shop/star/marsboard.htmlSigned-off-by: Sergio Prado <sergio.prado@e-labworks.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 26 Apr, 2016 8 commits
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Joshua Clayton authored
When compiled with "W=1", dtc complains: e.g. "Warning (unit_address_vs_reg): Node /soc/ipu@02800000/port@2/endpoint@0 has a unit name, but no reg property" Endpoint nodes don't have a reg property, and the addresses in their node names are ordinals without any special meaning so remove them and swap them for semantic node names. Signed-off-by: Joshua Clayton <stillcompiling@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
Table 8 from MX6DL datasheet (IMX6SDLCEC Rev. 5, 06/2015): http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6SDLCEC.pdf states the following: "LDO Output Set Point (VDD_ARM_CAP) = 1.125 V minimum for operation up to 396 MHz." So fix the entry by adding the 25mV margin value as done in the other entries of the table, which results in 1.15V for 396MHz operation. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
198MHz is a valid operating point for mx6sx. Add entries for VDD_ARM_CAP and VDD_SOC_CAP voltages for 198MHz according to the imx6sx datahseet: http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6SXIEC.pdf (a 25mV offset is added to the minimum allowed values for safety). These values also match the ones from the NXP kernel. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
Adjust the VDD_ARM_CAP and VDD_SOC_CAP voltages according to Table-11 from MX6UL datasheet: http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6ULCEC.pdf (a 25mV offset is added to the minimum allowed values for safety). Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Akshay Bhat authored
The BA16 module has a PMIC that uses the WDOG_B output from iMX6 to reset the system on a watchdog timeout. Configure the watchdog to assert the external reset signal (WDOG_B) using fsl,ext-reset-output property. Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Akshay Bhat authored
Previously the LDB_DIx clocks could be specified in the ldb node. With the ERR009219 errata fix applied, the ldb_di clocks now needs to be specified in the clks node to ensure the clocks are setup early in the boot process. Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Akshay Bhat authored
The default monitor that ships with B850v3 requires a 65MHz pixel clock. 65MHz can not be achieved using PLL3 (480MHz/7=68.5MHz). Hence set the LDB_DIx clock source to PLL5. Since PLL5 is already in use by IPU1_DIx, set the clock source for IPU1_DIx to PLL2_PFD2 to allow simultaneous display on both LVDS and HDMI interface. Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Akshay Bhat authored
Remove ldb panel entry for the following reasons: - The b850v3 has an onboard LVDS to DisplayPort converter (STDP4028). So we should not limit the monitors that can be connected by hardcoding the auo,b133htn01 1080p panel. - The default resolution on the LVDS interface needs to be WXGA or less. Otherwise when a 1080p monitor is connected to the HDMI port there is no output on both the LVDS and HDMI ports since a single IPU on i.MX6 can not handle two 1080p displays. With the panel entry removed from the devicetree, drm driver defaults the resolution on LVDS interface to XGA. Once in userspace, applications can set the desired resolution on LVDS interface over IPU2 CRTC. Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 18 Apr, 2016 2 commits
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Maciej S. Szmigiero authored
The official UDOO board kit has 7 and 15.6 inch touchscreen LCD panels as options. This patch adds support for 7 inch panel only, but the 15.6 inch one should be easy to add using the same regulator, backlight device and LVDS channel. Since this panel is an option for UDOO board it is disabled by default and can be enabled (for example) by the following U-Boot commands: fdt set backlight status okay fdt set panelchan status okay fdt set panel7 status okay fdt set touchscreenp7 status okay The LVDS channels is also disabled by default to avoid warning from its driver. Signed-off-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Alexander Kurz authored
Add the Keypad Port (KPP) devicetree nodes for IMX31 and IMX35 SOC. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 13 Apr, 2016 23 commits
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Stefan Agner authored
The DCU IP has distinct clock inputs for register access and the pixel clocks, at least in some implementations. LS1021a seems to use the same clock, therefore specify the same clock for "dcu" and "pix". Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Alexander Stein authored
Both DSPI have signals SPIn_PCS[0:5] so in summary 6 chip-selects, not 5. Fix that. Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Liu Gang authored
Add gpio nodes for ls1021a platform dts file. The gpio IP block of the ls1021a can be supported by the code drivers/gpio/gpio-mpc8xxx.c. The compatible "fsl,qoriq-gpio" is used by gpio driver: drivers/gpio/gpio-mpc8xxx.c to implement general gpio functionalities. The chip-specific compatible "fsl,ls1021a-gpio" may be used to fix potential gpio IP block errata or other chip-specific gpio issues. Signed-off-by: Liu Gang <Gang.Liu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Akshay Bhat authored
The vqmmc supply is not connected to bio supply on the BA16 module. Hence remove vqmmc-supply property in usdhc3 node. Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Minghuan Lian authored
Add SCFG MSI dts node and add msi-parent property to PCIe dts node that points to the corresponding MSI node. Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com> Tested-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Uwe Kleine-König authored
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Soeren Moch authored
According to Documentation/devicetree/bindings/net/fsl-fec.txt the polarity of "phy-reset-gpios" is assumed to be active-low unless a separate property "phy-reset-active-high" is available. So replace the inconsistent polarity description to make the correct active-low reset behavior more obvious. Signed-off-by: Soeren Moch <smoch@web.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Cory Tusar authored
This commit adds support for Rev. B of a Zodiac Inflight Innovations development board, mainly intended for DSA and ARINC 429 development work. Signed-off-by: Cory Tusar <cory.tusar@pid1solutions.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Stefan Agner authored
Add missing reg properties to AIPS bus and Cortex-A5's PMU unit. This change avoids the following warnings: Warning (unit_address_vs_reg): Node /soc/aips-bus@40000000 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/aips-bus@40080000 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/aips-bus@40080000/pmu@40089000 has a unit name, but no reg property Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Stefan Agner authored
The NAND flash memory populated on Colibri VF61 allows faster NAND timings than the flash memory on VF50. Additionally, due to divider limitations, VF61 did clock the flash even slower than VF50. Assign the NFC clock in the module specific device trees vf500-colibri.dtsi and vf610-colibri.dtsi respectively. This increases raw read speed on Colibri VF61 by about 20%. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Stefan Agner authored
The Vybrid based Colibri modules provide a on-module PHY which is connected to the second FEC instance FEC1. Since the on-module Ethernet port is considered as primary ethernet interface, alias fec1 as ethernet0. This also makes sure that the first MAC address provided by the boot loader gets assigned to the FEC instance used for the on-module PHY. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
Introduce imx6sx-sdb-sai.dts so that it is possible to use the SAI interface. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
Document the 'fsl,sdma-event-remap' property and provide an example of its usage. Cc: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
Property 'dma-source' is not used anywhere, nor it is documented, so let's just get rid of it. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
According to sdma_peripheral_type in include/linux/platform_data/dma-imx.h IMX_DMATYPE_SAI corresponds to index 24, so fix it accordingly. Suggested-by: Zidan Wang <zidan.wang@nxp.com> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Justin Waters authored
pwm2 is provided on the BA16 Q7 module, but is not used on any of the current configurations. However, future platforms may utilize this device, so we are simply disabling the node rather than removing it completely. Signed-off-by: Justin Waters <justin.waters@timeys.com> Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Gary Bisson authored
Based on i.MX6 SoloX with 1GB of RAM. https://boundarydevices.com/product/nit6_solox-imx6/Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
It is preferred to use the panel compatible string rather than passing the LCD timings in the device tree. So pass the "hannstar,hsd100pxn1" compatible string to describe the LVDS panel on this board. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lothar Waßmann authored
This baseboard can be used with all TX6 SoMs, but only a certain set of combinations can be ordered by default. Add support for these combinations in mainline, so that users can easily adopt their own combination of SoM and baseboard themselves. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lothar Waßmann authored
Add support for the following i.MX6 based modules from Ka-Ro electronics GmbH: TX6S-8034: Processor Freescale i.MX 6 Solo, 800MHz RAM 256MiB DDR3 SDRAM ROM 128MiB NAND Flash Power supply Single 3.1V to 5.5V Size 31mm SO-DIMM Temp. Range industrial grade (-40°C/-25°C to 105°C Tj) TX6S-8035: Processor Freescale i.MX 6 Solo, 800MHz RAM 512MiB DDR3 SDRAM ROM 4GiB eMMC Power supply Single 3.1V to 5.5V Size 31mm SO-DIMM Temp. Range industrial grade (-40°C/-25°C to 105°C Tj) TX6U-8033: Processor Freescale i.MX 6 Dual Lite, 800MHz RAM 1GiB DDR3 SDRAM ROM 4GiB eMMC Power supply Single 3.1V to 5.5V Size 31mm SO-DIMM Temp. Range industrial grade (-40°C/-25°C to 105°C Tj) TX6Q-1036: Processor Freescale i.MX 6Quad, 1GHz RAM 1GB DDR3 SDRAM 64-bit ROM 8GiB eMMC Power supply Single 3.1V to 5.5V Size 31mm SO-DIMM Temp. Range Extended Consumer Grade (-20°C to 105°C Tj) Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lothar Waßmann authored
Add missing pinctrl for the RTS/CTS lines to uart1 and set the fsl,uart-has-rtscts property on all UARTs to enable support for HW handshake. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lothar Waßmann authored
Move the pinctrl setting for the board LED from the hoggrp node to a separate node referenced by the LED driver, so that the pin is free to be used for different purpose when the LED driver is disabled. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lothar Waßmann authored
DT maintainers don't like the 'simple-bus' container around the regulator nodes. So remove it. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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