- 14 Mar, 2011 22 commits
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Rabin Vincent authored
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Rabin Vincent authored
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Rabin Vincent authored
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> [Added constant 32-pin assignment in platform data] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This will configure the platform data for the PL011, PL022 and PL180 (derivate) PrimeCells found in the Ux500 to use DMA with the generic DMA engine for DMA40. Signed-off-by: Per Forlin <per.forlin@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This will configure the platform data for the PL180, PL011 and PL022 PrimeCells found in the U300 to use DMA with the generic PrimeCell DMA engine for COH 901 318. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
The mmci driver can handle a GPIO pin for card detect, using IRQs and all just fine, so switch to using that. Delete the old bogus input device hack, if userspace need to detect MMC cards it should use udev like everyone else. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Mian Yousaf Kaukab authored
- DMA tx and rx maps for usb channels are set to be configured at runtime - MUSB is enabled with soc specific base address, irq and dma configurations Signed-off-by: Mian Yousaf Kaukab <mian-yousaf.kaukab@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Mian Yousaf Kaukab authored
- DMA tx and rx maps for usb channels are set to be configured at runtime - GPIO configurations for usb are added - MUSB is enabled with soc specific base address, irq and dma configurations Signed-off-by: Mian Yousaf Kaukab <mian-yousaf.kaukab@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Mian Yousaf Kaukab authored
MUSB driver has been updated to separate out BSP layer from its generic parts, as separate driver. This patch configures the clock with the new platform driver name. Signed-off-by: Mian Yousaf Kaukab <mian-yousaf.kaukab@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Mian Yousaf Kaukab authored
USB resources and DMA40 configurations are dynamically with the data provided in ux500_add_usb() call. Though only DMA40 configurations differ between U8500 and U5500 (USB resource are common between them). Signed-off-by: Mian Yousaf Kaukab <mian-yousaf.kaukab@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Philippe Langlais authored
The levelshifter pins were set to inverted values, fix this up. Signed-off-by: Philippe Langlais <philippe.langlais@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Philippe Langlais authored
The clock speed for the SD/MMC clock was incorrect, rectify it. Signed-off-by: Philippe Langlais <philippe.langlais@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Philippe Langlais authored
Signed-off-by: Philippe Langlais <philippe.langlais@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Philippe Langlais authored
Proximity sensor is managed as an input event (SW_PROXIMITY). Signed-off-by: Philippe Langlais <philippe.langlais@linaro.org> [Named GPIO pin] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
We register keypads per-UIB now, remove this. Cc: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sundar Iyer authored
The U8500 UIB contains a Synaptics RMI touchpanel and a matrix keyboard via the TC35893 port expander device. Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sundar Iyer authored
The ST-UIB contains a matrix keypad interfaced with the STMPE1601 port expander and a ROHM BU2101 touch panel. Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Rabin Vincent authored
Add support for dynamic detection of the UIB used (at the cost of one i2c error on the lesser-used UIB) and also provide an override via a command line parameter if needed. Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sundar Iyer authored
Include ab8500 regulators for DB8500 SoC by default and fix build issues Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com> [Small fixup for changed boardfiles] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
Try to make the regulators a little bit more useful by adding some of the most basic consumers we're going to have in the end. Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: Rabin Vincent <rabin@rab.in> Cc: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com> Cc: Bengt Jonsson <bengt.g.jonsson@stericsson.com> Cc: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This adds the PMU resources necessary to get perf working with the DB5500 ASIC. Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 12 Mar, 2011 1 commit
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Russell King authored
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/tglx/linux-2.6-tcc into devel-stable
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- 11 Mar, 2011 6 commits
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Oskar Schirmer authored
There are two dividers used to derive bus clock from system clock: system clock is divided by SCKDIV+1, then by BCKDIV+1. SCKDIV divider has been ignored up to now, which is no problem as long as it is 0. Take SCKDIV into account for bus clock calculation. Signed-off-by: Oskar Schirmer <oskar@linutronix.de> Cc: bigeasy@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Oskar Schirmer authored
Remove double definition of ACLKUSBH, change parameter name in root_clk_disable, as there is no reason to have a different name than in root_clk_enable. No functional change. Signed-off-by: Oskar Schirmer <oskar@linutronix.de> Cc: bigeasy@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Oskar Schirmer authored
There is no reason why in case of PLL2 the configuration register should be read twice, while for PLL0/1 using the value previously read is used. Do the same for PLL2. Signed-off-by: Oskar Schirmer <oskar@linutronix.de> Cc: bigeasy@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Hans J. Koch authored
The calculation of the best divider value for a requested clock rate always returned a value that was slightly too large. It was also not protected against possible divisions by zero. Request for very low, but non zero rates would cause the ACLK divisor field to overflow. Catch this situation by using the maximum value. The internal function aclk_set_rate() calculates the correct divider value, but doesn't write it back to the register. Add the write back. Signed-off-by: Hans J. Koch <hjk@linutronix.de> Signed-off-by: Oskar Schirmer <oskar@linutronix.de> Cc: bigeasy@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Oskar Schirmer authored
The evaluation board is driven with 1.2V core voltage, so system clock must not exceed 192 MHz, bus clock must not exceed 110 MHz. Choose appropriate values and set DTCMWAIT accordingly. Adapt UART setting to avoid console log interruption and wait for the specified locking time of 300us to pass. Signed-off-by: Oskar Schirmer <oskar@linutronix.de> Cc: bigeasy@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Oskar Schirmer authored
If NAND is enabled we better have the include around. Signed-off-by: Oskar Schirmer <oskar@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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- 10 Mar, 2011 5 commits
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Ilia Mirkin authored
The semantic match that finds the problem: // <smpl> @@ type T; identifier x; @@ T *x; ... * memset(x, ..., ... * sizeof(x) * ...); // </smpl> Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Richard Zhu authored
Some cards have the CRC errors in read on mx51 BBG board. Configure the eSDHC pad configurations to level up the compatibility to fix this issue. Signed-off-by: Richard Zhu <Hong-Xing.Zhu@freescale.com> Tested-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Shawn Guo authored
Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Shawn Guo authored
Most likely, the LCD panel on mx28 platform will require a pixel clock higher than ref_xtal_clk (24 MHz), so the patch initializes the parent of lcdif clock as ref_pix_clk. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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- 08 Mar, 2011 6 commits
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Baruch Siach authored
Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Baruch Siach authored
This typo was fixed in 46e3f307 (mx25: fix spi device registration typo), but a the merge at 0e44e059 (Merge commit 'v2.6.37-rc4' into imx-for-2.6.38) resolved the merge conflict wrongly. Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Alberto Panizzo authored
Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Alberto Panizzo authored
Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Alberto Panizzo authored
Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Alberto Panizzo authored
This fix a kernel NULL pointer error while initialising SPI introduced by: 4d2f13be1e370a670c1cae20c194d5ce961e0fa5 Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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