- 16 Dec, 2021 33 commits
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Thierry Reding authored
The HSP instances on Tegra194 are not fully compatible with the version found on Tegra186, so drop the fallback compatible string from the list. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The Tegra194 pinmux DT bindings do not define the nvidia,lpdr property, so drop them from the device trees that have listed them. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The standard "jedec," vendor prefix should be used for SPI NOR flash chips. This allows the right DT schema to be picked for validation. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Audio graph endpoints don't have a "reg" property, so they shouldn't have a unit-address either. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The Tegra186 CCPLEX cluster register region is 4 MiB is length, not 4 MiB - 1. This was likely presumed to be the "limit" rather than length. Fix it up. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The I2C controller found on Tegra186 is not fully compatible with the Tegra210 version, so drop the fallback compatible string from the list. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Child nodes of the TI INA3221 power monitor device tree node should be called input@* according to the DT schema. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The DT schema requires that nodes representing thermal zones include a "-thermal" suffix in their name. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Make the order of the clocks and clock-names properties match the order in the device tree bindings. This isn't strictly necessary from a point of view of the operating system because matching will be done based on the clock-names, but it makes it easier to validate the device trees against the DT schema. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The CML1 and PLL_E clocks are never explicitly used by the AHCI controller found on Tegra132, so drop them from the corresponding device tree node. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The I2C controller found on Tegra124 is not fully compatible with the Tegra114 version, so drop the fallback compatible string from the list. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Add peripheral OPP tables on Tegra132 and wire them up to ACTMON and the EMC. While at it, add the missing "#interconnect-cells" properties to the memory controller and external memory controller nodes. Also set the "#reset-cells" property for the memory controller because it exports the hotflush reset controls. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The TKE (time-keeping engine) found on Tegra132 is not backwards compatible with the version found on Tegra20, so update the compatible string list accordingly. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The Tegra PMC device tree bindings don't support the "#wake-cells" and "nvidia,reset-gpio" properties, so remove them. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The AS3722 pinmux device tree node doesn't have a "reg" property and therefore must not have a unit-address, so drop it. While at it, add missing unit-addresses for the charger and smart battery IC's on the ChromeOS embedded controller's I2C tunnel bus. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The native timers IP block found on NVIDIA Tegra SoCs implements a watchdog timer that can be used to recover from system hangs. Add the device tree node on Tegra186. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Regulators defined at the top level in device tree are no longer part of a simple bus and therefore don't have a reg property. Nodes without a reg property shouldn't have a unit-address either, so drop the unit address from the node names. To ensure nodes aren't duplicated (in which case they would end up merged in the final DTB), append the name of the regulator to the node name. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Clocks defined at the top level in device tree are no longer part of a simple bus and therefore don't have a reg property. Nodes without a reg property shouldn't have a unit-address either, so drop the unit address from the node names. To ensure nodes aren't duplicated (in which case they would end up merged in the final DTB), append the name of the clock to the node name. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Jon Hunter authored
The display controllers are attached to a separate ARM SMMU instance that is dedicated to servicing isochronous memory clients. Add this ISO instance of the ARM SMMU to device tree. Please note that the display controllers are not hooked up to this SMMU yet, because we are still missing a means to transition framebuffers used by the bootloader to the kernel. This based upon an initial patch by Thierry Reding <treding@nvidia.com>. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Jon Hunter authored
Populate the device-tree nodes for NVENC and NVJPG Host1x engines on Tegra186 and Tegra194. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Prathamesh Shete authored
Add support to enumerate SD in UHS mode on Tegra194. Add required device-tree properties in SDMMC1 and SDMMC3 instances to enable dynamic pad voltage switching and enumerate SD card in UHS-I modes. Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Mikko Perttunen authored
The Jetson AGX Orin Developer Kit is a continuation of the Jetson Developer Kit line using the new NVIDIA Tegra234 (Orin) SoC. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The NVIDIA Tegra234 SoC has 3 clusters of 4 Cortex-A78AE CPU cores each, for a total of 12 CPUs. Each CPU has 64 KiB instruction and data caches with each cluster having an additional 256 KiB unified L2 cache and a 2 MiB L3 cache. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
These two controllers expose general purpose I/O pins that can be used to control or monitor a variety of signals. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Mikko Perttunen authored
Add a device for TCU (Tegra Combined UART) used for serial console. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Mikko Perttunen authored
Add missing properties to the eMMC controller, as required to use it on actual hardware. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Mikko Perttunen authored
On final Tegra234 systems, shared memory for communication with BPMP is located at offset 0x70000 in SYSRAM. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Mikko Perttunen authored
The RTC device requires a clock. Add it. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The json-schema bindings for SRAM expect the nodes to be called "sram" rather than "sysram" or "shmem". Furthermore, place the brackets around the SYSRAM references such that a two-element array is created rather than a two-element array nested in a single-element array. This is not relevant for device tree itself, but allows the nodes to be properly validated against json-schema bindings. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
dt-bindings: memory: Add Tegra234 support This stable tag contains the addition of the EMC clock ID and an initial list of memory client IDs for Tegra234 and will be shared between the memory and ARM SoC trees.
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Thierry Reding authored
Document the variant of the memory controller and external memory controllers found on Tegra234 and add some memory client and SMMU stream ID definitions for use in device tree files. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The #interconnect-cells properties are required to hook up memory clients to the MC/EMC in interconnects properties. Add a description for these properties. For the nested EMC controller, the list of required properties was missing. Add it so that the validation can be more strict. Also, allow multiple reg entries required by Tegra194 and later. While at it, also remove the dummy BPMP node from the example because it is incomplete and fails validation. It's also not necessary for this file and the BPMP DT schema already has a full example. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Mikko Perttunen authored
Add a few more clocks that will be used in follow-up patches to enable more functionality on Tegra234. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
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- 14 Nov, 2021 7 commits
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Linus Torvalds authored
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Gustavo A. R. Silva authored
Add Kconfig support for -Wimplicit-fallthrough for both GCC and Clang. The compiler option is under configuration CC_IMPLICIT_FALLTHROUGH, which is enabled by default. Special thanks to Nathan Chancellor who fixed the Clang bug[1][2]. This bugfix only appears in Clang 14.0.0, so older versions still contain the bug and -Wimplicit-fallthrough won't be enabled for them, for now. This concludes a long journey and now we are finally getting rid of the unintentional fallthrough bug-class in the kernel, entirely. :) Link: https://github.com/llvm/llvm-project/commit/9ed4a94d6451046a51ef393cd62f00710820a7e8 [1] Link: https://bugs.llvm.org/show_bug.cgi?id=51094 [2] Link: https://github.com/KSPP/linux/issues/115 Link: https://github.com/ClangBuiltLinux/linux/issues/236Co-developed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Kees Cook <keescook@chromium.org> Co-developed-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Nathan Chancellor <nathan@kernel.org> Tested-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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git://git.kernel.org/pub/scm/fs/xfs/xfs-linuxLinus Torvalds authored
Pull xfs cleanups from Darrick Wong: "The most 'exciting' aspect of this branch is that the xfsprogs maintainer and I have worked through the last of the code discrepancies between kernel and userspace libxfs such that there are no code differences between the two except for #includes. IOWs, diff suffices to demonstrate that the userspace tools behave the same as the kernel, and kernel-only bits are clearly marked in the /kernel/ source code instead of just the userspace source. Summary: - Clean up open-coded swap() calls. - A little bit of #ifdef golf to complete the reunification of the kernel and userspace libxfs source code" * tag 'xfs-5.16-merge-5' of git://git.kernel.org/pub/scm/fs/xfs/xfs-linux: xfs: sync xfs_btree_split macros with userspace libxfs xfs: #ifdef out perag code for userspace xfs: use swap() to make dabtree code cleaner
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git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linuxLinus Torvalds authored
Pull more parisc fixes from Helge Deller: "Fix a build error in stracktrace.c, fix resolving of addresses to function names in backtraces, fix single-stepping in assembly code and flush userspace pte's when using set_pte_at()" * tag 'for-5.16/parisc-3' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc/entry: fix trace test in syscall exit path parisc: Flush kernel data mapping in set_pte_at() when installing pte for user page parisc: Fix implicit declaration of function '__kernel_text_address' parisc: Fix backtrace to always include init funtion names
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git://git.libc.org/linux-shLinus Torvalds authored
Pull arch/sh updates from Rich Felker. * tag 'sh-for-5.16' of git://git.libc.org/linux-sh: sh: pgtable-3level: Fix cast to pointer from integer of different size sh: fix READ/WRITE redefinition warnings sh: define __BIG_ENDIAN for math-emu sh: math-emu: drop unused functions sh: fix kconfig unmet dependency warning for FRAME_POINTER sh: Cleanup about SPARSE_IRQ sh: kdump: add some attribute to function maple: fix wrong return value of maple_bus_init(). sh: boot: avoid unneeded rebuilds under arch/sh/boot/compressed/ sh: boot: add intermediate vmlinux.bin* to targets instead of extra-y sh: boards: Fix the cacography in irq.c sh: check return code of request_irq sh: fix trivial misannotations
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git://git.armlinux.org.uk/~rmk/linux-armLinus Torvalds authored
Pull ARM fixes from Russell King: - Fix early_iounmap - Drop cc-option fallbacks for architecture selection * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: 9156/1: drop cc-option fallbacks for architecture selection ARM: 9155/1: fix early early_iounmap()
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git://git.kernel.org/pub/scm/linux/kernel/git/robh/linuxLinus Torvalds authored
Pull devicetree fixes from Rob Herring: - Two fixes due to DT node name changes on Arm, Ltd. boards - Treewide rename of Ingenic CGU headers - Update ST email addresses - Remove Netlogic DT bindings - Dropping few more cases of redundant 'maxItems' in schemas - Convert toshiba,tc358767 bridge binding to schema * tag 'devicetree-fixes-for-5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: dt-bindings: watchdog: sunxi: fix error in schema bindings: media: venus: Drop redundant maxItems for power-domain-names dt-bindings: Remove Netlogic bindings clk: versatile: clk-icst: Ensure clock names are unique of: Support using 'mask' in making device bus id dt-bindings: treewide: Update @st.com email address to @foss.st.com dt-bindings: media: Update maintainers for st,stm32-hwspinlock.yaml dt-bindings: media: Update maintainers for st,stm32-cec.yaml dt-bindings: mfd: timers: Update maintainers for st,stm32-timers dt-bindings: timer: Update maintainers for st,stm32-timer dt-bindings: i2c: imx: hardware do not restrict clock-frequency to only 100 and 400 kHz dt-bindings: display: bridge: Convert toshiba,tc358767.txt to yaml dt-bindings: Rename Ingenic CGU headers to ingenic,*.h
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