- 07 Aug, 2023 40 commits
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Shashank Sharma authored
This patch adds a helper function which converts a doorbell's relative index in a BO to an absolute doorbell offset in the doorbell BAR. V2: No space between the variable name doc (Luben) Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian Koenig <christian.koenig@amd.com> Acked-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Shashank Sharma <shashank.sharma@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Lijo Lazar authored
Energy counter should be reported in units of 15.259 uJ. Don't apply any conversion. Signed-off-by:
Lijo Lazar <lijo.lazar@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Shashank Sharma authored
This patch: - creates a doorbell page for graphics driver usages. - adds a few new varlables in adev->doorbell structure to keep track of kernel's doorbell-bo. - removes the adev->doorbell.ptr variable, replaces it with kernel-doorbell-bo's cpu address. V2: - Create doorbell BO directly, no wrappe functions (Alex) - no additional doorbell structure (Alex, Christian) - Use doorbell_cpu_ptr, remove ioremap (Christian, Alex) - Allocate one extra page of doorbells for MES (Alex) V4: Move MES doorbell base init into MES related patch (Christian) Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian Koenig <christian.koenig@amd.com> Reviewed-by: -
Lijo Lazar authored
Make the new ascis to follow nbio callback method to get pcie replay count. Signed-off-by:
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Yang Wang authored
- fix variable ('attr') dereferenced issue. - using condition check instead of BUG_ON(). Fixes: 4e01847c ("drm/amdgpu: optimize amdgpu device attribute code") Cc: Dan Carpenter <dan.carpenter@linaro.org> Signed-off-by:Yang Wang <kevinyang.wang@amd.com> Reviewed-by:
Kenneth Feng <kenneth.feng@amd.com> Signed-off-by:
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Lijo Lazar authored
Add implementation to get pcie replay count for nbio v7.9. Signed-off-by:
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Shashank Sharma authored
This patch initialzes the ttm resource manager for doorbells. V2: Do not round up doorbell size (Alex) Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian Koenig <christian.koenig@amd.com> Reviewed-by:
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Alex Deucher authored
This patch adds changes: - to accommodate the new GEM domain for DOORBELLs - to accommodate the new TTM PL for DOORBELLs in order to manage doorbell pages as GEM object. V2: Addressed reviwe comments from Christian - drop the doorbell changes for pinning/unpinning - drop the doorbell changes for dma-buf map - drop the doorbell changes for sgt - no need to handle TTM_PL_FLAG_CONTIGUOUS for doorbell - add caching type for doorbell V3: - Removed unrelated empty line (Christian) - Add PL_DOORBELL in mem_type_to_domain() as well (Alex) Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian Koenig <christian.koenig@amd.com> Reviewed-by: -
Jay Cornwall authored
SMEM instructions can reach addresses above 47 bits but require bit 47 to be sign-extended through bits [63:48]. This allows the TMA to be relocated in a following patch. Signed-off-by:
Jay Cornwall <jay.cornwall@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
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Jay Cornwall authored
The TBA and TMA, along with an unused IB allocation, reside at low addresses in the VM address space. A stray VM fault which hits these pages must be serviced by making their page table entries invalid. The scheduler depends upon these pages being resident and fails, preventing a debugger from inspecting the failure state. By relocating these pages above 47 bits in the VM address space they can only be reached when bits [63:48] are set to 1. This makes it much less likely for a misbehaving program to generate accesses to them. The current placement at VA (PAGE_SIZE*2) is readily hit by a NULL access with a small offset. Signed-off-by:
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Jay Cornwall authored
Some changes have been lost during rebases. Rebuild sources. Signed-off-by:
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Alex Deucher authored
This patch adds flags for a new gem domain AMDGPU_GEM_DOMAIN_DOORBELL in the UAPI layer. V2: Drop 'memory' from description (Christian) Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian Koenig <christian.koenig@amd.com> Reviewed-by:
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Shashank Sharma authored
This patch removes the check and change in num_kernel_doorbells for MES, which is not being used anywhere by MES code. V2: Fixed checkpatch warnings. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian Koenig <christian.koenig@amd.com> Reviewed-by:
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Lijo Lazar authored
Add a callback in nbio to get pcie replay count. Signed-off-by:
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Aric Cyr authored
Acked-by:
Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by:
Aric Cyr <aric.cyr@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
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Nicholas Choi authored
This reverts commit 5b29369b. This patch causes IGT test case 'kms_atomic@plane-immutable-zpos' to fail on AMDGPU hardware. Cc: Joshua Ashton <joshua@froggi.es> Signed-off-by:
Nicholas Choi <Nicholas.Choi@amd.com> Tested-by:
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Alvin Lee authored
[Description] Add new interface for notifying OS of cursor support changes Reviewed-by:
Alvin Lee <alvin.lee2@amd.com> Tested-by:
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Srinivasan Shanmugam authored
Fixes the following style issues: ERROR: open brace '{' following function definitions go on the next line WARNING: printk() should include KERN_<LEVEL> facility level Cc: Guchun Chen <guchun.chen@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Bert Karwatzki <spasswolf@web.de> Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com> Cc: Luben Tuikov <luben.tuikov@amd.com> Signed-off-by:Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by:
Luben Tuikov <luben.tuikov@amd.com> Signed-off-by:
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Fangzhi Zuo authored
Create MST colorsapce property for downstream device would trigger warning message "RIP: 0010:drm_mode_object_add+0x8e/0xa0 [drm]" After driver is loaded and drm device is registered, create dp colorspace property triggers warning storm at WARN_ON(!dev->driver->load && dev->registered && !obj_free_cb); Temporary disabling MST dp colorspace property for now. Reviewed-by:
Fangzhi Zuo <jerry.zuo@amd.com> Tested-by:
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Srinivasan Shanmugam authored
Usage of container_of is wrong here. struct acpi_device *adev = container_of(handle, struct acpi_device, handle) This reverts commit b0bd0a92. References: https://gitlab.freedesktop.org/drm/amd/-/issues/2744 Cc: Guchun Chen <guchun.chen@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Bert Karwatzki <spasswolf@web.de> Signed-off-by:
Guchun Chen <guchun.chen@amd.com> Signed-off-by:
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Melissa Wen authored
Don't set predefined degamma curve to cursor plane if the cursor attribute flag is not set. Applying a degamma curve to the cursor by default breaks userspace expectation. Checking the flag before performing any color transformation prevents too dark cursor gamma in DCN3+ on many Linux desktop environment (KDE Plasma, GNOME, wlroots-based, etc.) as reported at: - https://gitlab.freedesktop.org/drm/amd/-/issues/1513 This is the same approach followed by DCN2 drivers where the issue is not present. Fixes: 03f54d7d ("drm/amd/display: Add DCN3 DPP") Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1513Signed-off-by:
Melissa Wen <mwen@igalia.com> Reviewed-by:
Harry Wentland <harry.wentland@amd.com> Tested-by:
Alex Hung <alex.hung@amd.com> Signed-off-by:
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Joshua Aberback authored
[Why] Adjust timeout handling code for easier runtime manipulation during debug. Change has no functional effect by default. Reviewed-by:
Joshua Aberback <joshua.aberback@amd.com> Tested-by:
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Zhigang Luo authored
Init TA ucode for SRIOV. Signed-off-by:
Zhigang Luo <Zhigang.Luo@amd.com> Acked-by:
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Zhigang Luo authored
For SRIOV VF, FB location is programmed by host driver, no need to program it in guest driver. v2: squash in unused variable removal Signed-off-by:
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Bhawanpreet Lakha authored
Add various functions for replay, such as construct, destroy, enable get_state, and copy_setting etc. These functions communicate with the firmware to setup and enable panel replay Signed-off-by:
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by:
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Prike Liang authored
Now the SDMA firmware can support SDMA MGCG properly, so let's enable it from the driver side. Signed-off-by:
Prike Liang <Prike.Liang@amd.com> Acked-by:
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Hawking Zhang authored
For non-GFX IP blocks, set up ras obj if ras feature is allowed. For GFX IP blocks, force issue ras enable_feature command to firmware and only set up ras obj if ras feature is allowed Signed-off-by:
Tao Zhou <tao.zhou1@amd.com> Signed-off-by:
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Hawking Zhang authored
amdgpu_ras_late_init will invoke ras_late_init call per IP block Signed-off-by:
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Srinivasan Shanmugam authored
Fixes the following: ERROR: code indent should use tabs where possible WARNING: Missing a blank line after declarations WARNING: Prefer 'unsigned int' to bare use of 'unsigned' WARNING: suspect code indent for conditional statements (8, 24) + if (!(data & (DAGB0_CNTL_MISC2__DISABLE_WRREQ_CG_MASK | [...] + *flags |= AMD_CG_SUPPORT_MC_MGCG; Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
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Srinivasan Shanmugam authored
As amdgpu.h is getting decomposed, move vram and gtt extern defines into amdgpu_ttm.h & flash extern to amdgpu_psp.h Fixes: f9acfafc ("drm/amdgpu: Move externs to amdgpu.h file from amdgpu_drv.c") Suggested-by:
Mario Limonciello <mario.limonciello@amd.com> Signed-off-by:
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Srinivasan Shanmugam authored
Usage of container_of is wrong here. struct acpi_device *adev = container_of(handle, struct acpi_device, handle) This reverts commit cbd0606e. References: https://gitlab.freedesktop.org/drm/amd/-/issues/2744 Cc: Guchun Chen <guchun.chen@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Bert Karwatzki <spasswolf@web.de> Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com> Cc: Luben Tuikov <luben.tuikov@amd.com> Signed-off-by:
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Hawking Zhang authored
For GFX IP that only supports poison consumption, GFX RAS won't be marked as enabled. i.e., hardware doesn't support gfx sram ecc. But driver still needs to issue firmware to enable poison consumption mode for GFX IP. In such case, check poison mode and treat GFX IP as RAS capable IP block. Signed-off-by:
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Hawking Zhang authored
Some IP blocks only support partial ras feature and don't have ras counter and/or ras error status register at all. Driver should not create err_count sysfs node for those IP blocks. Signed-off-by:
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Bhawanpreet Lakha authored
In some instances, the GPU is transmitting repeated frame to the sink without any updates or changes in the content. These repeat transmission are wasteful, resulting in power draw in different aspects of the system 1. DCN is fetching the frame of data from DF/UMC/DRAM. This memory traffic prevents power down of parts of this HW path. 2. GPU is transmitting pixel data to the display through the main link of the DisplayPort interface. This prevents power down of both the Source transmitter (TX) and the Sink receiver (RX) The concepts of utilizing replay is similar to PSR, but there is a benefit of: Source and Sink remaining synchronized which allows for - lower latency when switching from replay to live frames - enable the possibility of more use cases - easy control of the sink's refresh rate during replay Due to Source and Sink remaining timing synchronized, Replay can be activated in more UI scenarios. Signed-off-by: -
Srinivasan Shanmugam authored
Sort the include files that are included in amdgpu_drv.c alphabetically. Suggested-by:
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Srinivasan Shanmugam authored
Fixes the below: ERROR: switch and case should be at the same indent WARNING: Prefer 'unsigned int' to bare use of 'unsigned' WARNING: Block comments use * on subsequent lines WARNING: Comparisons should place the constant on the right side of the test Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
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Praful Swarnakar authored
Fixes the following to align to linux coding style: WARNING: Block comments use a trailing */ on a separate line WARNING: Block comments should align the * on each line Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Guchun Chen <guchun.chen@amd.com> Signed-off-by:
Praful Swarnakar <Praful.Swarnakar@amd.com> Reviewed-by:
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Praful Swarnakar authored
Fixes the following to align to linux coding style: WARNING: Missing a blank line after declarations WARNING: sizeof *rd should be sizeof(*rd) Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Guchun Chen <guchun.chen@amd.com> Signed-off-by:
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Yang Wang authored
if GFX clock is in DS (Deep Sleep) state, the current gfx freq may less then dpm level 0, then pp_dpm_sclk node unable show correct freq. (align output format with other cards) Signed-off-by:
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Evan Quan authored
The existing OD interface cannot support the growing demand for more OD features. We are in the transition to a new OD mechanism. So, disable the SMU13 OD feature support temporarily. And this should be reverted when the new OD mechanism online. Signed-off-by:
Evan Quan <evan.quan@amd.com> Reviewed-by:
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