- 10 May, 2021 1 commit
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Victor Zhao authored
Sriov gets suspend of IP block <dce_virtual> failed as return value was not initialized. v2: return 0 directly to align original code semantic before this was broken out into a separate helper function instead of setting initial values Signed-off-by:
Victor Zhao <Victor.Zhao@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
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- 29 Apr, 2021 39 commits
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Dennis Li authored
The wave's number per simd in aldebaran is changed to 8, so it is impossible to use old algorithm to initiate all sgprs with one threadgroup. The new algorithm firstly use three threadgroups to initiate most sgprs simultaneously and then use another threadgroup with 4 waves to cover other uninitiated sgprs. v2: Add more description about the new algorithm to clear sgprs and add some comment for shader binaries Signed-off-by:
Dennis Li <Dennis.Li@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Harish Kasiviswanathan authored
v2: updated MEC FW version after validating gws with debugger Signed-off-by:
Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Reviewed-by:
Joseph Greathouse <Joseph.Greathouse@amd.com> Signed-off-by:
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Philip Yang authored
After draining the stale retry fault, or failed to validate the range to recover, have to remove the fault address from fault filter ring, to be able to handle subsequent retry interrupt on same address. Otherwise the retry fault will not be processed to recover until timeout passed. Signed-off-by:
Philip Yang <Philip.Yang@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
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Philip Yang authored
Add interface to remove address from fault filter ring by resetting fault ring entry key, then future vm fault on the address will be processed to recover. Define fault key as atomic64_t type to use atomic read/set/cmpxchg key to protect fault ring access by interrupt handler and interrupt deferred work for vg20. Change fault->timestamp to 48-bit to share same uint64_t with 8-bit fault->next, it is enough for 48bit IH timestamp. Signed-off-by:
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Philip Yang authored
Retry fault interrupt maybe pending in IH ring after GPU page table is updated to recover the vm fault, because each page of the range generate retry fault interrupt. There is race if application unmap range to remove and free the range first and then retry fault work restore_pages handle the retry fault interrupt, because range can not be found, this vm fault can not be recovered and report incorrect GPU vm fault to application. Before unmap to remove and free range, drain retry fault interrupt from IH ring1 to ensure no retry fault comes after the range is removed. Drain retry fault interrupt skip the range which is on deferred list to remove, or the range is child range, which is split by unmap, does not add to svms and have interval notifier. Signed-off-by:
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Philip Yang authored
Sometimes IH do not setup ring wptr overflow flag after wptr exceed rptr. As a workaround, if IH rptr equals to wptr, ring is empty, return true to indicate IH ring checkpoint is processed, IH ring drain is finished. Signed-off-by:
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Philip Yang authored
GPU vm retry fault recover range need retry validation if 1. range is split in parallel by unmap while recover 2. range migrate to system memory and range is updated in system memory while recover Signed-off-by:
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Jonathan Kim authored
The plural of 'process' should be 'processes'. Signed-off-by:
Jonathan Kim <jonathan.kim@amd.com> Reviewed-by:
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Jack Zhang authored
Disable all ip's hw status to false before any hw_init. Only set it to true until its hw_init is executed. The old 5.9 branch has this change but somehow the 5.11 kernrel does not have this fix. Without this change, sriov tdr have gfx IB test fail. Signed-off-by:
Jack Zhang <Jack.Zhang1@amd.com> Review-by:
Emily Deng <Emily.Deng@amd.com> Signed-off-by:
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Christian König authored
Merge the two loops, loosen the restriction for big allocations. This reduces the CPU overhead in the good case, but increases it a bit under memory pressure. Signed-off-by:
Christian König <christian.koenig@amd.com> Acked-and-Tested-by:
Nirmoy Das <nirmoy.das@amd.com> Reviewed-by:
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Philip Yang authored
Use devm_memunmap_pages instead of memunmap_pages to release pgmap and remove pgmap from device action, to avoid double free pgmap when unloading driver module. Release device memory region if failed to create device memory pages structure. Signed-off-by:
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Colin Ian King authored
There is a spelling mistake in a pr_debug message. Fix it. Signed-off-by:
Colin Ian King <colin.king@canonical.com> Reviewed-by:
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Feifei Xu authored
Correct and init the sdma4.x irq.num_types. v2: squash in fix (Alex) Signed-off-by:
Feifei Xu <Feifei.Xu@amd.com> Reviewed-by:
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Feifei Xu authored
Change the print level into debug. Signed-off-by:
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Victor Zhao authored
PSP clear_vf_fw feature is outdated and has been removed. Remove the related functions. Signed-off-by:
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Aric Cyr authored
Signed-off-by:
Aric Cyr <aric.cyr@amd.com> Acked-by:
Wayne Lin <waynelin@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
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Anthony Koo authored
Signed-off-by:
Anthony Koo <Anthony.Koo@amd.com> Acked-by:
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Max.Tseng authored
[Why] New platform. Need to add corresponding register control Signed-off-by:
Max.Tseng <Max.Tseng@amd.com> Reviewed-by:
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Yu-ting Shen authored
[why] we don't support authentication with DEVICE_COUNT=0 [how] check value DEVICE_COUNT before doing authentication Signed-off-by:
Yu-ting Shen <Yu-ting.Shen@amd.com> Reviewed-by:
Wenjing Liu <Wenjing.Liu@amd.com> Acked-by:
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Wenjing Liu authored
[why] As hardware team suggested that we need to add a max dsc bw overhead into existing stream bandwidth when DSC is used. The formula as below: max_dsc_bw_overhead = v_addressable * slice_count * 256 bit * pixel clock / v_total / h_total effective stream bandwidth = pixel clock * bpp stream bandwidth = effective stream bandwidth + dsc stream overhead Signed-off-by:
Eric Bernstein <Eric.Bernstein@amd.com> Acked-by:
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Mikita Lipski authored
[why] Previous statement would always evaluate to true making it meaningless [how] Just check if a connector is MST by checking if its port exists. Reported-by:
kernel test robot <lkp@intel.com> Signed-off-by:
Mikita Lipski <mikita.lipski@amd.com> Reviewed-by:
Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by:
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Robin Chen authored
[Why] It seems there's a typo to set MASTER_UPDATE_LOCK_DB_EN when disable doublebuffer lock. [How] Clear MASTER_UPDATE_LOCK_DB_EN when disable doublebuffer lock Signed-off-by:
Robin Chen <robin.chen@amd.com> Reviewed-by:
Joshua Aberback <Joshua.Aberback@amd.com> Acked-by:
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Max.Tseng authored
[Why] Add register for programming in new platform Signed-off-by:
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Chris Park authored
[Why] CLK mgr is null for server settings. [How] Guard the function with NULL check. Signed-off-by:
Chris Park <Chris.Park@amd.com> Reviewed-by:
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Jake Wang authored
[WHY & HOW] ABM assumes only 1 eDP is connected. Refactored existing ABM interface to support multiple instances. Signed-off-by:
Jake Wang <haonan.wang2@amd.com> Reviewed-by:
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Yu-ting Shen authored
[WHY] to initial ddc structure before we use them to avoid error checking. [HOW] add 0 as structure initialization value in DCN resource construct Signed-off-by:
Meenakshikumar Somasundaram <Meenakshikumar.Somasundaram@amd.com> Acked-by:
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Stylon Wang authored
[Why & How] Add a per-connector debugfs entry to expose internal display flag, which is indication that the display is "internally connected" and not hotpluggable. Signed-off-by:
Stylon Wang <stylon.wang@amd.com> Reviewed-by:
Wayne Lin <Wayne.Lin@amd.com> Tested-by:
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Lewis Huang authored
[Why] Driver program dpp clock calculate by pipe split config but hw config is single pipe. [How] Skip programming clock when allow seamless boot. After porgramming pipe config, seamless boot flag will be clear. Signed-off-by:
Lewis Huang <Lewis.Huang@amd.com> Reviewed-by:
Eric Yang <eric.yang2@amd.com> Acked-by:
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Lewis Huang authored
[Why] This change only fix dpp clock switch to lower case. New solution later can fix both case, which is "dc: skip program clock when allow seamless boot" [How] This reverts commit "dc: wait vblank when stream enabled and update dpp clock" Signed-off-by:
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Brandon Syu authored
[why] When setup is called after hdcp has already setup, it would cause to disable HDCP flow won’t execute. [how] Don't clean up hdcp content to be 0. Signed-off-by:
Brandon Syu <Brandon.Syu@amd.com> Reviewed-by:
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Michael Strauss authored
[WHY] New minor revision needs to be handled [HOW] Add switch case and assert to catch missing switch cases in the future Signed-off-by:
Michael Strauss <michael.strauss@amd.com> Reviewed-by:
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Hawking Zhang authored
amdgpu.h is included in kfd_priv.h Signed-off-by:
John Clements <John.Clements@amd.com> Signed-off-by:
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Hawking Zhang authored
Add socket/die information in RAS messages for platforms that support query those information Signed-off-by:
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Hawking Zhang authored
get_socket_id is used to query socket id Signed-off-by:
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Jinzhou Su authored
Add flags AMD_CG_SUPPORT_SDMA_LS for Vangogh. Start to open sdma ls from firmware version 70. Signed-off-by:
Jinzhou Su <Jinzhou.Su@amd.com> Reviewed-by:
Huang Rui <ray.huang@amd.com> Signed-off-by:
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Fabio M. De Francesco authored
Fixed a kernel-doc error in the documentation of a function. Signed-off-by:
Fabio M. De Francesco <fmdefrancesco@gmail.com> Reviewed-by:
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Souptick Joarder authored
Kernel test robot throws below warning -> >> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c:125:5: warning: >> no previous prototype for 'kgd_arcturus_hqd_sdma_load' >> [-Wmissing-prototypes] 125 | int kgd_arcturus_hqd_sdma_load(struct kgd_dev *kgd, void *mqd, >> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c:195:5: warning: >> no previous prototype for 'kgd_arcturus_hqd_sdma_dump' >> [-Wmissing-prototypes] 195 | int kgd_arcturus_hqd_sdma_dump(struct kgd_dev *kgd, >> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c:227:6: warning: >> no previous prototype for 'kgd_arcturus_hqd_sdma_is_occupied' >> [-Wmissing-prototypes] 227 | bool kgd_arcturus_hqd_sdma_is_occupied(struct kgd_dev *kgd, void *mqd) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ >> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c:246:5: warning: >> no previous prototype for 'kgd_arcturus_hqd_sdma_destroy' >> [-Wmissing-prototypes] 246 | int kgd_arcturus_hqd_sdma_destroy(struct kgd_dev *kgd, void *mqd, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Added prototype for these functions. Reported-by:Souptick Joarder <jrdr.linux@gmail.com> Reviewed-by:
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Darren Powell authored
v2 : change condition to apply to all chips after NAVI10 Writing to dcefclk causes the gpu to become unresponsive, and requires a reboot. Patch prevents user from successfully writing to file pp_dpm_dcefclk on parts NAVI10 and newer, and gives better user feedback that this operation is not allowed. Signed-off-by:
Darren Powell <darren.powell@amd.com> Reviewed-by:
Kenneth Feng <kenneth.feng@amd.com> Signed-off-by:
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Darren Powell authored
Writing to dcefclk causes the gpu to become unresponsive, and requires a reboot. Patch ignores a .force_clk_levels(SMU_DCEFCLK) call and issues an info message. Signed-off-by:
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