- 25 Jul, 2018 4 commits
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Christian König authored
Note that Harry and Leo Li are maintainers for that stuff. Signed-off-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Michel Dänzer <michel.daenzer@amd.com> Reviewed-by:
Harry Wentland <harry.wentland@amd.com> Reviewed-by:
Leo Li <sunpeng.li@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Roger unfortunately doesn't work for AMD any longer. So add Rui and Jerry as co-maintainer as well. Signed-off-by:
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Christian König authored
Going to completely rework the context to ring mapping with Nayan's GSoC work, but for now just stopping to expose the second UVD instance should do it. Signed-off-by:
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Christian König authored
No need to bitcast a boolean and even if we should use "!!" instead. Signed-off-by:
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- 24 Jul, 2018 13 commits
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Harry Wentland authored
Signed-off-by:
Aric Cyr <Aric.Cyr@amd.com> Acked-by:
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Jun Lei authored
[why] confusing as to which part of debug is informational, and which part causes behavioral change Signed-off-by:
Jun Lei <Jun.Lei@amd.com> Reviewed-by:
Tony Cheng <Tony.Cheng@amd.com> Acked-by:
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Bhawanpreet Lakha authored
[Why] Aux engine is created from i2caux layer. We want to remove this layer and use the engine directly. [How] Decouple aux engine from i2caux. Move aux engine related code to dce folder and use dc resource pool to manage the engine. And use the engine functions directly Signed-off-by:
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by:
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vikrant mhaske authored
[why] Diags has POR to run the video workload using AYCRCB8888 through DCN; capture it through DWB and send it to VCN hardware to encode [how] added the code to support this format so that DPP ICSC will be able to convert it from YUV444 to internal RGB and DWB OCSC will be able to convert from internal RGB to YUV420 Signed-off-by:
vikrant mhaske <vikrant.mhaske@amd.com> Reviewed-by:
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David Francis authored
[Why] When a dce100 asic was suspended, the clocks were not set to 0. Upon resume, the new clock was compared to the existing clock, they were found to be the same, and so the clock was not set. This resulted in a pernicious blackscreen. [How] In atomic commit, check to see if there are any active pipes. If no, set clocks to 0 Signed-off-by:
David Francis <David.Francis@amd.com> Reviewed-by:
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Tony Cheng authored
[why] diag specify what the full config and is only concerned about pass/fail at the end having inter-op code like verifiying we can actually train at reported link rate slows down diag test and add complexity we don't need [how] add dc_debug option to skip capability link trianing also remove hbr in function name as verify is not specific to hbr Signed-off-by:
Ken Chalmers <ken.chalmers@amd.com> Acked-by:
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Mikita Lipski authored
[why] The warning message floods the dmesg log on Tonga even though it is expected to have a pix_clk set to zero, when the pipe is not active. [how] remove the assert Signed-off-by:
Mikita Lipski <mikita.lipski@amd.com> Reviewed-by:
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Shirish S authored
This patch moves amdgpu_fbdev_set_suspend() to the beginning of suspend sequence. This is to ensure fbcon does not to write to the VRAM after GPU is powerd down. Signed-off-by:
Shirish S <shirish.s@amd.com> Reviewed-by:
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Michel Dänzer authored
The warning turned out to be not so useful, as BO destruction tends to be deferred to a workqueue. Also, we should be preventing any damage from this now, so not really important anymore to fix code doing this. Acked-by:
Mike Lothian <mike@fireburn.co.uk> Signed-off-by:
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Evan Quan authored
Otherwise there may be potential SMU performance issues. v2: fix commit description and coding style Signed-off-by:
Evan Quan <evan.quan@amd.com> Reviewed-by:
Rex Zhu <rex.zhu@amd.com> Signed-off-by:
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Evan Quan authored
The argument was set wrongly. Fast/slow switch was asked when there is actually a slow/fast switch needed. Signed-off-by:
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Evan Quan authored
Slow switch for UCLK when there is multiple displays and they are not in sync. Signed-off-by:
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Michel Dänzer authored
We were testing the register offset, instead of the value stored in the register, therefore always timing out the loop. This reduces suspend time of the system in the bug report below by ~600 ms. Cc: stable@vger.kernel.org Bugzilla: https://bugs.freedesktop.org/107277Tested-by:
Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-by:
Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by:
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- 20 Jul, 2018 18 commits
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Alex Deucher authored
Use the newly split ip suspend functions to do suspend displays first (to deal with atomic so that FBs can be unpinned before attempting to evict vram), then evict vram, then suspend the other IPs. Also move the non-DC pinning code to only be called in the non-DC cases since atomic should take care of DC. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107065 Fixes: e00fb856 drm: Stop updating plane->crtc/fb/old_fb on atomic drivers Acked-by:
Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by:
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Alex Deucher authored
We need to do some IPs earlier to deal with ordering issues similar to how resume is split into two phases. Do DCE first to deal with atomic, then do the rest. Acked-by:
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Alex Deucher authored
No change in behavior, just bail sooner. Reviewed-by:
Jim Qu <Jim.Qu@amd.com> Signed-off-by:
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Alex Deucher authored
Check the supported functions mask before calling the bios requests method. Reviewed-by:
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Andrey Grodzovsky authored
Problem: amdgpu_ttm_set_buffer_funcs_status destroys adev->mman.entity on suspend without releasing adev->mman.bdev.man[TTM_PL_VRAM].move fence so on resume the new drm_sched_entity.fence_context causes the warning against the old fence context which is different. Fix: When destroying sched_entity in amdgpu_ttm_set_buffer_funcs_status release man->move and set the pointer to NULL. Signed-off-by:
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Shirish S authored
This patch removes the usage of console_(un)lock by replacing drm_fb_helper_set_suspend() to drm_fb_helper_set_suspend_unlocked() which locks and unlocks the console instead of locking ourselves. Signed-off-by:
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Rex Zhu authored
Except special naming as *_in_khz, The default clock unit in powerplay is in 10KHz. so need to * 10 as expecting clock frequency in display is in kHz. Reviewed-by:
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Rex Zhu authored
avoid the error in dmesg: [drm:dm_pp_get_static_clocks] *ERROR* DM_PPLIB: invalid powerlevel state: 0! Reviewed-by:
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Rex Zhu authored
This can fix the issue resume from S3, the user's OD setting were reverted to default. Reviewed-by:
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Rex Zhu authored
Use the vddc limit before read them from vbios Reviewed-by:
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Shirish S authored
[Why] While the console_lock is held, console output will be buffered, till its unlocked it wont be emitted, hence its ideal to unlock sooner to enable debugging/detecting/fixing of any issue in the remaining sequence of events in resume path. The concern here is about consoles other than fbcon on the device, e.g. a serial console [How] This patch restructures the console_lock, console_unlock around amdgpu_fbdev_set_suspend() and moves this new block appropriately. V2: Kept amdgpu_fbdev_set_suspend after pci_set_power_state V3: Updated the commit message to clarify the real concern that this patch addresses. V4: code clean-up. V5: fixed return value Signed-off-by: -
Harry Wentland authored
[Why] We were only setting this mask for DCN, but should really use it universally for all ASICs. [How] Move the assignment out of the Raven switch statement for all ASICs other than Stoney and Carrizo. v2: Keep stutter always on for Carrizo and Stoney (Alex) Cc: Rex.Zhu@amd.com Cc: Feifei.Xu@amd.com Cc: Kenneth.Feng@amd.com Cc: Evan.Quan@amd.com Cc: Bhawanpreet.Lakha@amd.com Cc: Jordan.Lazare@amd.com Signed-off-by:
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Harry Wentland authored
These are only ever called for non-DC code. Signed-off-by:
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Colin Ian King authored
Trivial fix to spelling mistake in dev_err error message. Signed-off-by:
Colin Ian King <colin.king@canonical.com> Signed-off-by:
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
More features for 4.19: - Map processes to vmids for debugging GPUVM faults - Raven gfxoff fixes - Initial gfxoff support for vega12 - Use defines for interrupt sources rather than magic numbers - DC aux fixes - Finish DC logging TODO - Add more DC debugfs interfaces for conformance testing - Add CRC support for DCN - Scheduler rework in preparation for load balancing - Unify common smu9 code - Clean up UVD instancing support - ttm cleanups - Misc fixes and cleanups Signed-off-by:
Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180719194001.3488-1-alexander.deucher@amd.com
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git://anongit.freedesktop.org/drm/drm-intelDave Airlie authored
On GEM side: - GuC related fixes (Chris, Michal) - GTT read-only pages support (Jon, Chris) - More selftests fixes (Chris) - More GPU reset improvements (Chris) - Flush caches after GGTT writes (Chris) - Handle recursive shrinker for vma->last_active allocation (Chris) - Other execlists fixes (Chris) On Display side: - GLK HDMI fix (Clint) - Rework and cleanup around HPD pin (Ville) - Preparation work for Display Stream Compression support coming on ICL (Anusha) - Nuke LVDS lid notification (Ville) - Assume eDP is always connected (Ville) - Kill intel panel detection (Ville) Signed-off-by:
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git://anongit.freedesktop.org/drm/drm-miscDave Airlie authored
drm-misc-next for 4.19: Core Changes: - add support for DisplayPort CEC-Tunneling-over-AUX (Hans Verkuil) - more doc updates (Daniel Vetter) - fourcc: Add is_yuv field to drm_format_info (Ayan Kumar Halder) - dma-buf: correctly place BUG_ON (Michel Dänzer) Driver Changes: - more vkms support(Rodrigo Siqueira) - many fixes and small improments to all drivers Signed-off-by:
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git://github.com/skeggsb/linuxDave Airlie authored
misc fixes and cleanups for next. Signed-off-by:
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- 19 Jul, 2018 5 commits
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Christian König authored
The whole handle, filp and entity handling is superfluous here. We should have reviewed that more thoughtfully. It looks like somebody just made the code instance aware without knowing the background. v2: fix one more missed case in amdgpu_uvd_suspend Reviewed-by:
Leo Liu <leo.liu@amd.com> Signed-off-by:
Chunming Zhou <david1.zhou@amd.com> Signed-off-by:
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Christian König authored
Not sure what that was every used for, but now it is completely unused. Reviewed-by:
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Michel Dänzer authored
Allowing CONFIG_DRM_AMD_DC_DCN1_0 to be disabled on X86 was an opportunity for display with Raven Ridge accidentally not working. Reviewed-by:
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Evan Quan authored
The 'result' is not initialized correctly. It causes the API return an error code even on success. Signed-off-by:
Huang Rui <ray.huang@amd.com> Signed-off-by:
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Alex Deucher authored
Use the newly added irq source defines rather than magic numbers for smu7 thermal interrupts. Rewiewed-by:
Rex Zhu <rezhu@amd.com> Signed-off-by:
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