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- 03 Jul, 2022 35 commits
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Krzysztof Kozlowski authored
glink-edge node does not have children with unit addresses: sdm630-sony-xperia-ganges-kirin.dtb: glink-edge: '#address-cells', '#size-cells' do not match any of the regexes: 'pinctrl-[0-9] Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220517070113.18023-11-krzysztof.kozlowski@linaro.org
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Krzysztof Kozlowski authored
glink-edge bindings require label: ipq6018-cp01-c1.dtb: glink-edge: 'label' is a required property Signed-off-by:
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Bhupesh Sharma authored
As Bjorn noted in [1], since the qmp phy driver doesn't use the 'vdda-max-microamp' & 'vdda-pll-max-microamp' properties currently, let's remove them from the dts files as well. Otherwise, it leads to the following '$ make dtbs_check' warning(s): sm8350-microsoft-surface-duo2.dt.yaml: phy@1d87000: 'vdda-max-microamp', 'vdda-pll-max-microamp' do not match any of the regexes: '^phy@[0-9a-f]+$', 'pinctrl-[0-9]+ If later on the driver support is added, we can add these properties back to the dts files. [1]. https://lore.kernel.org/linux-arm-msm/YmQhpsmiYJzR99LK@ripper/ Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Vinod Koul <vkoul@kernel.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by:
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Robert Marko authored
Add USB power domains provided by GCC GDSCs. Add the required #power-domain-cells to the GCC as well. Signed-off-by:
Robert Marko <robimarko@gmail.com> Signed-off-by:
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Bjorn Andersson authored
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Bhupesh Sharma authored
Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports a number of issues with ordering of 'reg-names' as various possible combinations are possible for different qcom SoC dts files. Fix the same by updating the offending 'dts' files. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by:
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Bhupesh Sharma authored
Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports a number of issues with ordering of 'clocks' & 'clock-names' for sdhci nodes: arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900: clock-names:0: 'iface' was expected arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900: clock-names:1: 'core' was expected arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900: clock-names:2: 'xo' was expected Fix the same by updating the offending 'dts' files. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by:
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Bhupesh Sharma authored
Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports issues with inconsistent 'interconnect-names' used for sdhci nodes. Fix the same. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by:
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Bhupesh Sharma authored
Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports issues with inconsistent 'sdhci@' convention used for specifying the sdhci nodes. The generic mmc bindings expect 'mmc@' format instead. Fix the same. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by:
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Marijn Suijten authored
The entire Sony Nile and Ganges lineup utilize the first three channels (the triled channels) of the LPG block for an RGB (battery) status and notification indicator. Signed-off-by:
Marijn Suijten <marijn.suijten@somainline.org> [bjorn: Dropped #address/#size-cells] Signed-off-by:
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Marijn Suijten authored
The Light Pulse Generator describes a hardware block responsible for displaying colors and patterns on an RGB LED (usually used for [battery] status and notifications), and drive PWM signals for general-purpose (ie. backlight) LEDs. The availability and usage of the individual channels differ per board and is hence left for individual platform DTs to configure. Signed-off-by:
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Andrey Konovalov authored
The current settings refer to "blsp_spi1" function which isn't defined. For this reason an attempt to enable blsp1_spi1 interface results in the probe failure below: [ 3.492900] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table [ 3.502460] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table [ 3.517725] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table [ 3.532998] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table [ 3.548277] spi_qup: probe of 78b6000.spi failed with error -22 Fix this by making the functions used in qcs404.dtsi to match the contents of drivers/pinctrl/qcom/pinctrl-qcs404.c. Signed-off-by:
Andrey Konovalov <andrey.konovalov@linaro.org> Signed-off-by:
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Dmitry Baryshkov authored
Qualcomm RB5 platform uses Light Pulse Generator tri-led block to drive three green leds. Add device nodes defining those leds. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
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Dmitry Baryshkov authored
Add device node defining LPG/PWM block on PM8150L PMIC chip. Signed-off-by:
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Dmitry Baryshkov authored
Add device node defining LPG/PWM block on PM8150B PMIC chip. Signed-off-by:
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Krzysztof Kozlowski authored
The node names should be generic and DT schema expects certain pattern with 'led'. Signed-off-by:
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Krzysztof Kozlowski authored
Nodes do not need explicit status=okay. Signed-off-by:
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Krzysztof Kozlowski authored
gpio-keys children do not use unit addresses. Signed-off-by:
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Krzysztof Kozlowski authored
The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by:
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Krzysztof Kozlowski authored
Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by:
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Krzysztof Kozlowski authored
Add qcom,msm8998 SoC fallback to the board compatible. Signed-off-by:
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Krzysztof Kozlowski authored
The proper compatible for Micron n25q128a11 SPI NOR flash should include vendor-prefix. Signed-off-by:
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Krzysztof Kozlowski authored
The NVMEM bindings expect that 'bits' property holds offset and size of region within a byte, so it applies a constraint of <0, 7> for the offset. Using 25 as HSTX trim offset is within 4-byte QFPROM word, but outside of the byte: sdm630-sony-xperia-nile-discovery.dtb: qfprom@780000: hstx-trim@240:bits:0:0: 25 is greater than the maximum of 7 sdm630-sony-xperia-nile-discovery.dtb: qfprom@780000: gpu-speed-bin@41a0:bits:0:0: 21 is greater than the maximum of 7 Align the offsets to match the bindings. Signed-off-by:
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Krzysztof Kozlowski authored
Use dedicated compatibles for QFPROM on MSM8916, MSM8996, MSM8998, QCS404 and SDM630 which is expected by the bindings: msm8996-mtp.dtb: qfprom@74000: compatible:0: 'qcom,qfprom' is not one of ['qcom,apq8064-qfprom', ... Signed-off-by:
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Krzysztof Kozlowski authored
On PM660L, PMI8994 and PMI8998, the WLED has two address spaces and with size-cells=0, they should be encoded as two separate items. Signed-off-by:
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Krzysztof Kozlowski authored
The AOSS QMP bindings expect all compatibles to be followed by fallback "qcom,aoss-qmp" because all of these are actually compatible with each other. This fixes dtbs_check warnings like: sm8250-hdk.dtb: power-controller@c300000: compatible: ['qcom,sm8250-aoss-qmp'] is too short Signed-off-by:
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Joseph S. Barrera III authored
Kingoftown is a trogdor-based board. These dts files are unchanged copies from the downstream Chrome OS 5.4 kernel. Signed-off-by:
Joseph S. Barrera III <joebar@chromium.org> Reviewed-by:
Douglas Anderson <dianders@chromium.org> Tested-by:
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Joseph S. Barrera III authored
Pazquel is a trogdor-based board. These dts files are unchanged copies from the downstream Chrome OS 5.4 kernel. Signed-off-by:
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Joseph S. Barrera III authored
Mrbland is a trogdor-based board. These dts files are copies from the downstream Chrome OS 5.4 kernel, but with downstream bits removed. Signed-off-by:
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Joseph S. Barrera III authored
Quackingstick is a trogdor-based board. These dts files are copies from the downstream Chrome OS 5.4 kernel, but with downstream bits removed. Signed-off-by:
Stephen Boyd <swboyd@chromium.org> Reviewed-by:
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Joseph S. Barrera III authored
Wormdingler is a trogdor-based board, shipping to customers as the Lenovo IdeaPad Chromebook Duet 3. These dts files are copies from the downstream Chrome OS 5.4 kernel, but with the camera (sc7180-trogdor-mipi-camera.dtsi) #include removed. Signed-off-by:
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Gwendal Grignou authored
To ease matching configuration of sysfs attributes for particular sensor, match label reported by iio 'label' attribute with the location label generated by ChromeOS config tool. Signed-off-by:
Gwendal Grignou <gwendal@chromium.org> Reviewed-by:
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Johan Hovold authored
Add an initial devicetree for the Lenovo Thinkpad X13s with support for USB, backlight, keyboard, touchpad, touchscreen (to be verified), PMICs and remoteprocs. Signed-off-by:
Johan Hovold <johan+linaro@kernel.org> Reviewed-by:
Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by:
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Bjorn Andersson authored
Introduce the Qualcomm SA8540P automotive platform and the SA8295P ADP development board. The SA8540P and SC8280XP are fairly similar, so the SA8540P is built ontop of the SC8280XP dtsi to reduce duplication. As more advanced features are integrated this might be re-evaluated. This initial contribution supports SMP, CPUFreq, cluster idle, UFS, RPMh regulators, debug UART, PMICs, remoteprocs (NSPs crashes shortly after booting) and USB. The SA8295P ADP contains four PM8450 PMICs, which according to their revid are compatible with PM8150. They are defined within the ADP for now, to avoid creating additional .dtsi files for PM8150 with just addresses changed - and to allow using the labels from the schematics. Signed-off-by:
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Bjorn Andersson authored
Add basic support for the SC8280XP reference device, which allows it to boot to a shell (using EFIFB) with functional storage (UFS), USB, keyboard, touchpad, touchscreen, backlight and remoteprocs. The PMICs are, per socinfo, reused from other platforms. But given that the address of the PMICs doesn't match other cases and that it's desirable to label things according to the schematics a new dtsi file is created to represent the reference combination of PMICs. Signed-off-by:
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- 30 Jun, 2022 5 commits
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Robert Marko authored
Add bindings for the USB GDSCs found in IPQ8074 GCC. Signed-off-by:
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Bjorn Andersson authored
Introduce initial support for the Qualcomm SC8280XP platform, aka 8cx Gen 3. This initial contribution supports SMP, CPUfreq, CPU cluster idling, GCC, TLMM, SMMU, RPMh regulators, power-domains and clocks, interconnects, some QUPs, UFS, remoteprocs, USB, watchdog, LLCC and tsens. Signed-off-by:
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Bjorn Andersson authored
Add a client for the NSP1 found in some recent Qualcomm platforms. Acked-by:
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Bjorn Andersson authored
Add the CRD (Compute Reference Design?) and the Lenovo Thinkpad X13s to the valid device compatibles found on the sc8280xp platform. Signed-off-by:
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Sibi Sankar authored
Add interconnects requirements for the SCM interface on SM8450 SoCs. Signed-off-by:
Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by:
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