1. 07 Apr, 2017 1 commit
  2. 05 Apr, 2017 20 commits
    • Takashi Sakamoto's avatar
      ALSA: firewire-lib/bebob/oxfw: improve response evaluation for AV/C commands · 7e1621de
      Takashi Sakamoto authored
      In ALSA firewire stack, some AV/C commands are supported, including
      vendor's extensions. Drivers includes response parser of each command,
      according to its requirements, while the parser is written with loose
      fashion in two points; error check and length check. This doesn't cause
      any issues such as kernel corruption, but should be improved.
      
      This commit modifies evaluations of return value on each parsers.
      Reported-by: default avatarDan Carpenter <dan.carpenter@oracle.com>
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      7e1621de
    • Takashi Sakamoto's avatar
      ALSA: firewire-motu: remove invalid bitshift for register value · 5b33504b
      Takashi Sakamoto authored
      In protocol version 3, drivers can read current sampling clock status from
      register 0x'ffff'f000'0b14. 8 bits of LSB of this register represents type
      of signal as source of clock.
      
      Current driver code includes invalid bitshift to handle the parameter. This
      commit fixes the bug.
      Reported-by: default avatarDan Carpenter <dan.carpenter@oracle.com>
      Fixes: 5992e300 ("ALSA: firewire-motu: add support for MOTU 828mk3 (FireWire/Hybrid) as a model with protocol version 3")
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      5b33504b
    • Takashi Sakamoto's avatar
      ALSA: firewire-digi00x: remove transaction handler for unknown purpose · fdb2b2ee
      Takashi Sakamoto authored
      For digi00x series, asynchronous transaction is not used to transfer MIDI
      messages to/from control surface. One of transction handlers in my previous
      work loses its practical meaning.
      
      This commit removes the handler. I note that unit of console type
      transfers 0x00001000 to registered address of host space when switching
      to 'standalone' mode. Then the unit generates bus reset.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      fdb2b2ee
    • Takashi Sakamoto's avatar
      ALSA: firewire-digi00x: allow user space applications to read/write MIDI messages for all ports · 0c3f15f3
      Takashi Sakamoto authored
      At a commit c5fcee03 ("ALSA: firewire-digi00x: add MIDI operations for
      MIDI control port"), I described that MIDI messages for control surface is
      transferred by a different way from the messages for physical ports.
      However, this is wrong. MIDI messages to/from all of MIDI ports are
      transferred by isochronous packets.
      
      This commit removes codes to transfer MIDI messages via asynchronous
      transaction, from MIDI handling layer.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      0c3f15f3
    • Takashi Sakamoto's avatar
      ALSA: firewire-digi00x: handle all MIDI messages on streaming packets · 8820a4cf
      Takashi Sakamoto authored
      At a commit 9dc5d31c ("ALSA: firewire-digi00x: handle MIDI messages in
      isochronous packets"), a functionality to handle MIDI messages on
      isochronous packet was supported. But this includes some of my
      misunderstanding. This commit is to fix them.
      
      For digi00x series, first data channel of data blocks in rx/tx packet
      includes MIDI messages. The data channel has 0x80 in 8 bit of its MSB,
      however it's against IEC 61883-6. Unique data format is applied:
       - Upper 4 bits of LSB represent port number.
        - 0x0: port 1.
        - 0x2: port 2.
        - 0xe: console port.
       - Lower 4 bits of LSB represent the number of included MIDI message bytes;
         0x0/0x1/0x2.
       - Two bytes of middle of this data channel have MIDI bytes.
      
      Especially, MIDI messages from/to console surface are also transferred by
      isochronous packets, as well as physical MIDI ports.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      8820a4cf
    • Takashi Sakamoto's avatar
      ALSA: firewire-digi00x: add support for console models of Digi00x series · 13e005f9
      Takashi Sakamoto authored
      Digi00x series includes two types of unit; rack and console. As long as
      reading information on config rom of Digi 002 console, 'MODEL_ID' field
      has a different value from the one on Digi 002 rack.
      
      We've already got a test report from users with Digi 003 rack. We can
      assume that console type and rack type has different value in the field.
      
      This commit adds a device entry for console type. For following commits,
      this commit also adds a member to 'struct snd_digi00x' to identify console
      type.
      
      $ cd linux-firewire-utils/src
      $ python2 ./crpp < /sys/bus/firewire/devices/fw1/config_rom
                     ROM header and bus information block
                     -----------------------------------------------------------------
      400  0404f9d0  bus_info_length 4, crc_length 4, crc 63952
      404  31333934  bus_name "1394"
      408  60647002  irmc 0, cmc 1, isc 1, bmc 0, cyc_clk_acc 100, max_rec 7 (256)
      40c  00a07e00  company_id 00a07e     |
      410  00a30000  device_id 0000a30000  | EUI-64 00a07e0000a30000
      
                     root directory
                     -----------------------------------------------------------------
      414  00058a39  directory_length 5, crc 35385
      418  0c0043a0  node capabilities
      41c  04000001  hardware version
      420  0300a07e  vendor
      424  81000007  --> descriptor leaf at 440
      428  d1000001  --> unit directory at 42c
      
                     unit directory at 42c
                     -----------------------------------------------------------------
      42c  00046674  directory_length 4, crc 26228
      430  120000a3  specifier id
      434  13000001  version
      438  17000001  model
      43c  81000007  --> descriptor leaf at 458
      
                     descriptor leaf at 440
                     -----------------------------------------------------------------
      440  00055913  leaf_length 5, crc 22803
      444  000050f2  descriptor_type 00, specifier_ID 50f2
      448  80000000
      44c  44696769
      450  64657369
      454  676e0000
      
                     descriptor leaf at 458
                     -----------------------------------------------------------------
      458  0004a6fd  leaf_length 4, crc 42749
      45c  00000000  textual descriptor
      460  00000000  minimal ASCII
      464  44696769  "Digi"
      468  20303032  " 002"
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      13e005f9
    • Takashi Sakamoto's avatar
      ALSA: fireface: add support for Fireface 400 · 76fdb3a9
      Takashi Sakamoto authored
      Fireface 400 is a second model of RME Fireface series, released in 2006.
      This commit adds support for this model.
      
      This model supports 8 analog channels, 2 S/PDIF channels and 8 ADAT
      channels in both of tx/rx packet. The number of ADAT channels differs
      depending on each mode of sampling transmission frequency.
      
      $ python2 linux-firewire-utils/src/crpp < /sys/bus/firewire/devices/fw1/config_rom
                     ROM header and bus information block
                     -----------------------------------------------------------------
      400  04107768  bus_info_length 4, crc_length 16, crc 30568 (should be 61311)
      404  31333934  bus_name "1394"
      408  20009002  irmc 0, cmc 0, isc 1, bmc 0, cyc_clk_acc 0, max_rec 9 (1024)
      40c  000a3501  company_id 000a35     |
      410  1bd0862a  device_id 011bd0862a  | EUI-64 000a35011bd0862a
      
                     root directory
                     -----------------------------------------------------------------
      414  000485ec  directory_length 4, crc 34284
      418  03000a35  vendor
      41c  0c0083c0  node capabilities per IEEE 1394
      420  8d000006  --> eui-64 leaf at 438
      424  d1000001  --> unit directory at 428
      
                     unit directory at 428
                     -----------------------------------------------------------------
      428  000314c4  directory_length 3, crc 5316
      42c  12000a35  specifier id
      430  13000002  version
      434  17101800  model
      
                     eui-64 leaf at 438
                     -----------------------------------------------------------------
      438  000261a8  leaf_length 2, crc 25000
      43c  000a3501  company_id 000a35     |
      440  1bd0862a  device_id 011bd0862a  | EUI-64 000a35011bd0862a
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      76fdb3a9
    • Takashi Sakamoto's avatar
      ALSA: fireface: add hwdep interface · f656edd5
      Takashi Sakamoto authored
      This commit adds hwdep interface so as the other drivers for audio and
      music units on IEEE 1394 have.
      
      This interface is designed for mixer/control applications. By using this
      interface, an application can get information about firewire node, can
      lock/unlock kernel streaming and can get notification at starting/stopping
      kernel streaming.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      f656edd5
    • Takashi Sakamoto's avatar
      ALSA: fireface: add support for PCM functionality · 4b316436
      Takashi Sakamoto authored
      This commit adds PCM functionality to transmit/receive PCM frames on
      isochronous packet streaming. This commit enables userspace applications
      to start/stop packet streaming via ALSA PCM interface.
      
      Sampling rate requested by applications is used as sampling transmission
      frequency of IEC 61883-1/6packet streaming. As I described in followed
      commits, units in this series manages sampling clock frequency
      independently of sampling transmission frequency, and they supports
      resampling between their packet streaming/data block processing layer and
      sampling data processing layer. This commit take this driver to utilize
      these features for usability.
      
      When internal clock is selected as source signal of sampling clock, this
      driver allows user space applications to start PCM substreams at any rate
      which packet streaming engine supports as sampling transmission frequency.
      In this case, this driver expects units to perform resampling PCM frames
      for rx/tx packets when sampling clock frequency and sampling transmission
      frequency are mismatched. This is for daily use cases.
      
      When any external clock is selected as the source signal, this driver
      gets configured sampling rate from units, then restricts available
      sampling rate to the rate for PCM applications. This is for studio use
      cases.
      
      Models in this series supports 64.0/128.0 kHz of sampling rate, however
      these frequencies are not supported by IEC 61883-6 as sampling transmission
      frequency. Therefore, packet streaming engine of ALSA firewire stack can't
      handle them. When units are configured to use any external clock as source
      signal of sampling clock and one of these unsupported rate is configured
      as rate of the sampling clock, this driver returns EIO to user space
      applications.
      
      Anyway, this driver doesn't voluntarily configure parameters of sampling
      clock. It's better for users to work with appropriate user space
      implementations to configure the parameters in advance of usage.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      4b316436
    • Takashi Sakamoto's avatar
      ALSA: fireface: add stream management functionality · 75d6d898
      Takashi Sakamoto authored
      This commit adds management functionality for packet streaming.
      
      As long as investigating Fireface 400, there're three modes depending
      on sampling transmission frequency. The number of data channels in each
      data block is different depending on the mode. The set of available
      data channels for each mode might be different for each protocol and
      model.
      
      The length of registers for the number of isochronous channel is just
      three bits, therefore 0-7ch are available.
      
      When bus reset occurs on IEEE 1394 bus, the device discontinues to
      transmit packets. This commit aborts PCM substreams at bus reset handler.
      
      As I described in followed commits, The device manages its sampling clock
      independently of sampling transmission frequency against IEC 61883-6.
      Thus, it's a lower cost to change the sampling transmission frequency,
      while data fetch between streaming layer and DSP require larger buffer
      for resampling. As a result, device latency might tend to be larger than
      ASICs for IEC 61883-1/6 such as DM1000/DM1100/DM1500 (BeBoB),
      DiceII/TCD2210/TCD2220/TCD3070 and OXFW970/971.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      75d6d898
    • Takashi Sakamoto's avatar
      ALSA: fireface: add unique data processing layer · 6fb7db90
      Takashi Sakamoto authored
      As long as investigating Fireface 400, format of payload of each
      isochronous packet is not IEC 61883-1/6, thus its format of data block
      is not AM824. The remarkable points of the format are:
       * The payload just consists of some data channels of quadlet size without
         CIP header.
       * Each data channels includes data aligned to little endian order.
       * One data channel consists of two parts; 8 bit ancillary field and 24 bit
         PCM frame.
      
      Due to lack of CIP headers, rx/tx packets include no CIP headers and
      different way to check packet discontinuity. For tx packet, the ancillary
      field is used for counter. However, the way of counting is different
      depending on positions of data channels. At 44.1 kHz, ancillary field in:
       * 1st/6th/9th/10th/14th/17th data channels: not used for this purpose.
       * 2nd/18th data channels: incremented every data block (0x00-0xff).
       * 3rd/4th/5th/11th/12th/13th data channels: incremented every 256 data
         blocks (0x00-0x07).
       * 7th/8th/15th/16th data channels: incremented per the number of data
         blocks in a packet. The increment can occur per packet (0x00-0xff).
      
      For tx packet, tag of each isochronous packet is used for this purpose.
      The value of tag cyclically changes between 0, 1, 2 and 3 in this order.
      The interval is different depending on sampling transmission frequency.
      At 44.1/48.0 kHz, it's 256 data blocks. At 88.2 kHz, it's 96 data blocks.
      
      The number of data blocks in tx packet is exactly the same as
      SYT_INTERVAL. There's no empty packet or no-data packet, thus the
      throughput is not 8,000 packets per sec. On the other hand, the one in
      rx packet is 8,000 packets per sec, thus the number of data blocks is
      different between each packet, depending on sampling transmission
      frequency:
       * 44.1 kHz: 5 or 6
       * 48.0 kHz: 5 or 6 or 7
       * 88.2 kHz: 10 or 11 or 12
      
      This commit adds data processing layer to satisfy the above specification
      in a policy of 'best effort'. Although PCM frames are handled for
      intermediate buffer to user space, the ancillary data is not handled at all
      to reduce CPU usage, thus counter is not checked. 0 is always used for tag
      of isochronous packet. Furthermore, the packet streaming layer is
      responsible for calculation of the number of data blocks for each packet,
      thus it's not exactly the same sequence from the above observation.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      6fb7db90
    • Takashi Sakamoto's avatar
      ALSA: firewire-lib: add no-header packet processing · 3b196c39
      Takashi Sakamoto authored
      As long as investigating Fireface 400, IEC 61883-1/6 is not applied to
      its packet streaming protocol. Remarks of the specific protocol are:
       * Each packet doesn't include CIP headers.
       * 64,0 and 128,0 kHz are supported.
       * The device doesn't necessarily transmit 8,000 packets per second.
       * 0, 1, 2, 3 are used as tag for rx isochronous packets, however 0 is
         used for tx isochronous packets.
      
      On the other hand, there's a common feature. The number of data blocks
      transferred in a second is the same as sampling transmission frequency.
      Current ALSA IEC 61883-1/6 engine already has a method to calculate it and
      this driver can utilize it for rx packets, as well as tx packets.
      
      This commit adds support for the transferring protocol. CIP_NO_HEADERS
      flag is newly added. When this flag is set:
       * Both of 0 (without CIP header) and 1 (with CIP header) are used as tag
         to handle incoming isochronous packet.
       * 0 (without CIP header) is used as tag to transfer outgoing isochronous
         packet.
       * Skip CIP header evaluation.
       * Use unique way to calculate the quadlets of isochronous packet payload.
      
      In ALSA PCM interface, 128.0 kHz is not supported, and the ALSA
      IEC 61883-1/6 engine doesn't support 64.0 kHz. These modes are dropped.
      
      The sequence of rx packet has a remarkable quirk about tag. This will be
      described in later commits.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      3b196c39
    • Takashi Sakamoto's avatar
      ALSA: firewire-lib: use the same prototype for functions to handle packet · ff0fb5aa
      Takashi Sakamoto authored
      Audio and music units of RME Fireface series use its own protocol for
      isochronous packets to transfer data. This protocol requires ALSA IEC
      61883-1/6 engine to have alternative functions.
      
      This commit is a preparation for the protocol.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      ff0fb5aa
    • Takashi Sakamoto's avatar
      ALSA: fireface: add proc node to help debugging · d3fc7aac
      Takashi Sakamoto authored
      Drivers can retrieve the state and configuration of clock by read
      transactions.
      
      This commit allows protocol abstraction layer to to dump the
      information for debugging, via proc interface.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      d3fc7aac
    • Takashi Sakamoto's avatar
      ALSA: fireface: add support for MIDI functionality · ff2c293e
      Takashi Sakamoto authored
      In previous commit, fireface driver supports unique transaction mechanism
      for MIDI feature. This commit adds MIDI functionality for userspace
      applications.
      
      As I wrote in a followed commit, user space applications get some
      requirement from this driver. It should not touch a register to which
      units transmit MIDI messages. It should configure a register in which
      MIDI transmission is controlled.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      ff2c293e
    • Takashi Sakamoto's avatar
      ALSA: fireface: add transaction support · 19174295
      Takashi Sakamoto authored
      As long as investigating Fireface 400, MIDI messages are transferred by
      asynchronous communication over IEEE 1394 bus.
      
      Fireface 400 receives MIDI messages by write transactions to two addresses;
      0x'0000'0801'8000 and 0x'0000'0801'9000. Each of two seems to correspond to
      MIDI port 1 and 2.
      
      Fireface 400 transfers MIDI messages by write transactions to certain
      addresses which configured by drivers. The drivers can decide upper 4 byte
      of the addresses by write transactions to 0x'0000'0801'03f4. For the rest
      part of the address, drivers can select from below options:
       * 0x'0000'0000
       * 0x'0000'0080
       * 0x'0000'0100
       * 0x'0000'0180
      
      Selected options are represented in register 0x'0000'0801'051c as bit
      flags. Due to this mechanism, drivers are restricted to use addresses on
      'Memory space' of IEEE 1222, even if transactions to the address have
      some side effects.
      
      This commit adds transaction support for MIDI messaging, based on my
      assumption that the similar mechanism is used on the other protocols. To
      receive asynchronous transactions, the driver allocates a range of address
      in 'Memory space'. I apply a strategy to use 0x'0000'0000 as lower 4 byte
      of the address. When getting failure from Linux FireWire subsystem, this
      driver retries to allocate addresses.
      
      Unfortunately, read transaction to address 0x'0000'0801'051c returns zero
      always, however write transactions have effects to the other features such
      as status of sampling clock. For this reason, this commit delegates a task
      to configure this register to user space applications. The applications
      should set 3rd bit in LSB in little endian order.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      19174295
    • Takashi Sakamoto's avatar
      ALSA: fireface: add an abstraction layer for model-specific protocols · 53eb0867
      Takashi Sakamoto authored
      As of 2016, RME discontinued its Fireface series, thus it's OK for us
      to focus on released firmwares to drive known units.
      
      As long as investigating Fireface 400 with Windows driver and comparing
      the result to FFADO implementation, I can see these firmwares have
      different register assignments. On the other hand, according to manuals
      of each models, features relevant to packet streaming seem to be common,
      because GUIs for these models have the same options. It's reasonable to
      assume an abstraction layer of protocols to communicate to each models.
      
      This commit adds the abstraction layer for the protocols. This layer
      includes some functions to operate common features of models in this
      series.
      
      In IEC 61883-1/6, the sequence of packet can transfer timing information
      to synchronize receivers to transmitters. Units of each node on IEEE 1394
      bus can generate transmitter's timing clock by handling value of SYT field
      in CIP header with high-precision clock. For audio and music units on
      IEEE 1394 bus, this recovered clock is designed to used for sampling clock
      to capture/generate PCM frames on DSP/ADC/DAC. (Actually, in this world,
      there's no units to implement this specification as is, as long as I
      know).
      
      Fireface series doesn't use this mechanism. Besides, It doesn't use
      isochronous packet with CIP header. It uses internal crystal unit as its
      initial sampling clock. When detecting input signals which can be
      available for sampling clock (e.g. ADAT input), drivers can configure
      units to use the signals as source of sampling clock. When something goes
      wrong, e.g. frequency mismatching between the signal and configured value,
      units fallback to the other detected signals alternatively. When detecting
      no alternatives, internal crystal unit is used as source of sampling
      clock. On manual of Fireface 400, this mechanism is described as
      'Autosync'.
      
      On the units, packet streaming is controlled by write transactions to
      certain registers. Format of the packet, e.g. the number of data channels
      in a data block, is also configured by the same manner. For this purpose,
      .begin_session and .finish_session is added.
      
      The remarkable point of this protocol is to allow drivers to configure
      arbitrary sampling transmission frequency; e.g. 12.345 Hz. As long as I
      know, there's no actual DAC/ADC chips which support this kind of
      capability. I think a pair of packet streaming layer and data block
      processing layer is isolated from sampling data processing layer in a
      point of governed clock. In short, between these parts, resampling layer
      exists. Actually, for Fireface 400, write transactions to
      0x'0000'8010'051c has an effect to change sampling clock frequency with
      base frequencies (32.0/44.1/48.0 kHz) and its multipliers (x2/x4),
      regardless of sampling transmission frequency.
      
      For this reason, the abstraction layer doesn't handle parameters for
      sampling clock. Instead, each implementation of .begin_session is
      expected to configure sampling transmission frequency.
      
      For packet streaming layer, it's enough to get current selection of
      source signals for the sampling clock and its frequency. In the
      abstraction layer, when internal crystal is selected, drivers can sets
      arbitrary sampling frequency, else they should follow configured
      frequency. For this purpose, .get_clock is added.
      
      Drivers are allows to bank up data fetching from a pair of packet
      streaming/data block processing layer and sampling data processing layer.
      This feature seems to suppress noises at starting/stopping packet
      streaming. For this purpose, .switch_fetching_mode is added.
      
      As I described in the above, units have remarkable mechanism to manage
      sampling clock and process sampling data. For debugging purpose,
      .dump_sync_status and .dump_clock_config are added. I don't have a need
      to common interface to represent the status and configuration,
      developers can add actual implementation of the abstraction layer as they
      like.
      
      Unlike PCM frames, MIDI messages are transferred by asynchronous
      communication over IEEE 1394 bus, thus target addresses are important for
      this feature. The .midi_high_addr_reg, .midi_rx_port_0_reg and
      .midi_rx_port_1_reg are for this purpose. I'll describe them in following
      commit.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      53eb0867
    • Takashi Sakamoto's avatar
      ALSA: fireface: add model specific structure · ed90f91a
      Takashi Sakamoto authored
      RME Fireface series has several models and their specifications are
      different. Currently, we find no way to retrieve the specifications
      from actual devices and need to implement them in this driver.
      
      This commit adds a structure to describe model specific data. This
      structure has an identical name for each unit, and maximum number of
      data channels in each mode. I'll describe about the mode in following
      commits.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      ed90f91a
    • Takashi Sakamoto's avatar
      ALSA: fireface: postpone sound card registration · 324540c4
      Takashi Sakamoto authored
      Just after appearing on IEEE 1394 bus, this unit generates several bus
      resets. This is due to loading firmware from on-board flash memory and
      initialize hardware. It's better to postpone sound card registration.
      
      This commit schedules workqueue to process actual probe processing
      2 seconds after the last bus-reset. The card instance is kept at unit
      probe callback and released at card free callback. Therefore, when the
      actual probe processing fails, the memory block is wasted. This is due to
      simplify driver implementation.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      324540c4
    • Takashi Sakamoto's avatar
      ALSA: fireface: add skeleton for RME Fireface series · 17c4e5ea
      Takashi Sakamoto authored
      This commit adds a new driver for RME Fireface series. This commit just
      creates/removes card instance according to IEEE 1394 bus event. More
      functions will be added in following commits.
      
      Three types of firmware have released by RME GmbH; for Fireface 400, for
      Fireface 800 and for UCX/802/UFX. It's reasonable that these models use
      different protocol for communication. Currently, I've investigated
      Fireface 400 and nothing others.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      17c4e5ea
  3. 03 Apr, 2017 3 commits
  4. 01 Apr, 2017 1 commit
  5. 31 Mar, 2017 4 commits
  6. 29 Mar, 2017 1 commit
  7. 28 Mar, 2017 10 commits
    • Takashi Sakamoto's avatar
      ALSA: firewire-motu: add support for MOTU 828mk3 (FireWire/Hybrid) as a model... · 5992e300
      Takashi Sakamoto authored
      ALSA: firewire-motu: add support for MOTU 828mk3 (FireWire/Hybrid) as a model with protocol version 3
      
      MOTU 828mk3 (FireWire/Hybrid) is one of third generation in MOTU FireWire
      series, produced in 2008/2014. This model consists of three chips for
      functionality on IEEE 1394 bus:
      
       * TI TSB41AB2 (Physical layer for IEEE 1394 bus)
       * Xilinx Spartan-3E FPGA Family (Link layer for IEEE 1394 bus, packet
         processing and data block processing layer)
       * TI TMS320C6722 (Digital signal processing)
      
      This commit adds a support for this model, with its unique protocol as
      version 3. This protocol has some additional features to protocol
      version 2.
      
       * Support several optical interfaces.
       * Support a data chunk for return of reverb effect.
       * Have a quirk of tx packets.
       * Support heartbeat asynchronous transaction.
      
      In this protocol, series of transferred packets has some quirks. Below
      fields in CIP headers of the packets are out of IEC 61883-1:
       - SID (source node id): always 0x0d
       - DBS (data block size): always 0x04
       - DBC (data block counter): always 0x00
       - EOH (End of header): always 0x00
      
      Below is an actual sample of transferred packets.
      
      quads CIP1       CIP2
      520   0x0D040400 0x22FFFFFF
        8   0x0D040400 0x22FFFFFF
      520   0x0D040400 0x22FFFFFF
      520   0x0D040400 0x22FFFFFF
        8   0x0D040400 0x22FFFFFF
      
      Status of clock is configured by write transactions to 0x'ffff'f000'0b14,
      as well as version 2, while meanings of fields are different from the
      former protocols. Modes of optical interfaces are configured by write
      transactions to 0x'ffff'f000'0c94.
      
      Drivers can register its address to receive heatbeat transactions from the
      unit. 0x'ffff'f000'0b0c is for the higher part and 0x'ffff'f000'0b10 is
      for the lower part. Nevertheless, this feature is not useless for this
      driver and this commit omits it.
      
      Each data block consists of two parts in a point of the number of included
      data chunks. In both of 'fixed' and 'differed' parts, the number of
      included data blocks are a multiple of 4, thus depending on models there's
      some empty data chunks. For example, 828mk3 includes one pair of empty
      data chunks in its fixed part. When optical interface is configured to
      S/PDIF, 828mk3 includes one pair of empty data chunks in its differed part.
      To reduce consumption of CPU cycles with additional conditions/loops, this
      commit just exposes these empty chunks to user space as PCM channels.
      
      Additionally, 828mk3 has a non-negligible overhead to change its sampling
      transfer frequency. When softwares send asynchronous transaction to
      perform it, LED on the unit starts to blink. In a worst case, it continues
      blink during several seconds; e.g. 10 seconds. When stopping blinking,
      the unit seems to be prepared for the requested sampling transfer
      frequency. To wait for the preparation, this commit forces the driver
      to call task scheduler and applications sleeps for 4 seconds.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      5992e300
    • Takashi Sakamoto's avatar
      ALSA: firewire-lib: add a quirk of packet without valid EOH in CIP format · 2128f78f
      Takashi Sakamoto authored
      In IEC 61883-1, when two quadlets CIP header is used, the most significant
      bit in second CIP header stands. However, packets from units with MOTU
      protocol version 3 have a quirk without this flag. Current packet streaming
      layer handles this as protocol error.
      
      This commit adds a new enumeration constant for this quirk, to handle MOTU
      protocol version 3.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      2128f78f
    • Takashi Sakamoto's avatar
      ALSA: firewire-motu: add support for MOTU 828mk2 as a model with protocol version 2 · 949613e3
      Takashi Sakamoto authored
      MOTU 828mk2 is one of second generation in MOTU FireWire series, produced in
      2003. This model consists of four chips:
       * TI TSB41AB2 (Physical layer for IEEE 1394 bus)
       * PDI 1394L40BE (Link layer for IEEE 1394 bus and packet processing layer)
       * ALTERA ACEX 1K EP1K30 Series FPGA (Data block processing layer)
       * TI TMS320VC5402 (Digital signal processing)
      
      This commit adds a support for this model, with its unique protocol as
      version 2. The features of this protocol are:
      
       * Support data chunks for status and control messages for both
         directions.
       * Support a pair of MIDI input/output.
       * Support a data chunk for mic/instrument independent of analog line in.
       * Support a data chunk for playback return.
       * Support independent data chunks for S/PDIF of both optical/coaxial
         interfaces.
       * Support independent data chunks for each of main out and phone out.
      
      Status of clock is configured by write transactions to 0x'ffff'f000'0b14.
      Modes of optical interfaces are configured by write transactions to
      0x'ffff'f000'0c04.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      949613e3
    • Takashi Sakamoto's avatar
      ALSA: firewire-motu: enable to read transaction cache via hwdep interface · 5aaab1bf
      Takashi Sakamoto authored
      MOTU FireWire series can transfer messages to registered address. These
      messages are transferred for the status of internal clock synchronization
      just after starting streams.
      
      When the synchronization is stable, it's 0x01ffffff. Else, it's 0x05ffffff.
      
      This commit adds a functionality for user space applications to receive
      content of the message.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      5aaab1bf
    • Takashi Sakamoto's avatar
      ALSA: firewire-motu: add hwdep interface · 71c37977
      Takashi Sakamoto authored
      This commit adds hwdep interface so as the other sound drivers for units
      on IEEE 1394 bus have.
      
      This interface is designed for mixer/control applications. By using this
      interface, an application can get information about firewire node, can
      lock/unlock kernel streaming and can get notification at starting/stopping
      kernel streaming.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      71c37977
    • Takashi Sakamoto's avatar
      ALSA: firewire-motu: add MIDI functionality · 9e796e7d
      Takashi Sakamoto authored
      In MOTU FireWire series, MIDI messages are multiplexed to isochronous
      packets as well as PCM frames, while the way is different from the one
      in IEC 61883-6.
      
      MIDI messages are put into a certain position in message chunks. One data
      block can includes one byte of the MIDI messages. When data block includes
      a MIDI byte, the block has a flag in a certain position of the message
      chunk. These positions are unique depending on protocols.
      
      Once a data block includes a MIDI byte, some following data blocks includes
      no MIDI bytes. Next MIDI byte appears on a data block corresponding to
      next cycle of physical MIDI bus. This seems to avoid buffer overflow caused
      by bandwidth differences between IEEE 1394 bus and physical MIDI bus.
      
      This commit adds MIDI functionality to transfer/receive MIDI messages.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      9e796e7d
    • Takashi Sakamoto's avatar
      ALSA: firewire-motu: add PCM functionality · dd49b2d1
      Takashi Sakamoto authored
      This commit adds PCM functionality to transmit/receive PCM samples.
      
      When one of PCM substreams are running or external clock source is
      selected, current sampling rate is used. Else, the sampling rate is
      changed according to requests from a userspace application.
      
      Available number of samples in a frame of PCM substream is determined at
      open(2) to corresponding PCM character device. Later, packet streaming
      starts by ioctl(2) with SNDRV_PCM_IOCTL_PREPARE. In theory, between them,
      applications can change state of the unit by any write transaction to
      change the number. In this case, this driver may fail packet streaming due
      to wrong data format.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      dd49b2d1
    • Takashi Sakamoto's avatar
      ALSA: firewire-motu: add proc node to show current statuc of clock and packet formats · 4638ec6e
      Takashi Sakamoto authored
      This commit adds a proc node for debugging purpose.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      4638ec6e
    • Takashi Sakamoto's avatar
      ALSA: firewire-motu: add stream management functionality · 9b2bb4f2
      Takashi Sakamoto authored
      This commit adds a functionality to manage packet streaming for MOTU
      FireWire series.
      
      The streaming is not controlled by CMP, thus against IEC 61883-1. Write
      transaction to certain addresses start/stop packet streaming.
      
      Transactions to 0x'ffff'f000'0b00 results in isochronous channel number for
      both directions and starting/stopping transmission of packets. The
      isochronous channel number is represented in 6 bit field, thus units can
      identify the channels up to 64, as IEEE 1394 bus specification described.
      
      Transactions to 0x'ffff'f000'0b10 results in packet format for both
      directions and transmission speed. When each of data block includes fixed
      part of data chunks only, corresponding flags stand.
      
      When bus reset occurs, the units continue to transmit packets with
      non-contiguous data block counter. This causes discontinuity detection in
      packet streaming engine and ALSA PCM applications receives EPIPE from any
      I/O operation. In this case, typical applications manage to recover
      corresponding PCM substream. This behaviour is kicked much earlier than
      callback of bus reset handler by Linux FireWire subsystem, therefore
      status of packet streaming is not changed in the handler.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      9b2bb4f2
    • Takashi Sakamoto's avatar
      ALSA: firewire-motu: handle transactions specific for MOTU FireWire models · 2e76701b
      Takashi Sakamoto authored
      All models of MOTU FireWire series can be controlled by write transaction
      to addresses in a range from 0x'ffff'f0000'0b00 to 0x'ffff'f000'0cff.
      
      The models support asynchronous notification. This notification has 32 bit
      field data, and is transferred when status of clock changes. Meaning of
      the value is not enough clear yet.
      
      Drivers can register its address to receive the notification. Write
      transaction to 0x'ffff'f000'0b04 registers higher 16 bits of the address.
      Write transaction to 0x'ffff'f0000'0b08 registers the rest of bits. The
      address includes node ID, thus it should be registered every time of bus
      reset.
      Signed-off-by: default avatarTakashi Sakamoto <o-takashi@sakamocchi.jp>
      Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      2e76701b