1. 23 Apr, 2019 23 commits
  2. 19 Apr, 2019 5 commits
    • Linus Walleij's avatar
      irqchip: Add driver for IXP4xx · 5b978c10
      Linus Walleij authored
      The IXP4xx (arch/arm/mach-ixp4xx) is an old Intel XScale
      platform that has very wide deployment and use.
      
      As part of modernizing the platform, we need to implement a
      proper irqchip in the irqchip subsystem.
      
      The IXP4xx irqchip is tightly jotted together with the GPIO
      controller, and whereas in the past we would deal with this
      complex logic by adding necessarily different code, we can
      nowadays modernize it using a hierarchical irqchip.
      
      The actual IXP4 irqchip is a simple active low level IRQ
      controller, whereas the GPIO functionality resides in a
      different memory area and adds edge trigger support for
      the interrupts.
      
      The interrupts from GPIO lines 0..12 are 1:1 mapped to
      a fixed set of hardware IRQs on this IRQchip, so we
      expect the child GPIO interrupt controller to go in and
      allocate descriptors for these interrupts.
      
      For the other interrupts, as we do not yet have DT
      support for this platform, we create a linear irqdomain
      and then go in and allocate the IRQs that the legacy
      boards use. This code will be removed on the DT probe
      path when we add DT support to the platform.
      
      We add some translation code for supporting DT
      translations for the fwnodes, but we leave most of that
      for later.
      
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Jason Cooper <jason@lakedaemon.net>
      Acked-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      5b978c10
    • Linus Walleij's avatar
      ARM: ixp4xx: Convert to SPARSE_IRQ · dc8ef8cd
      Linus Walleij authored
      This localizes the <mach/irqs.h> header to the mach-ixp4xx
      directory, removes NR_IRQS and switches IXP4xx over to using
      SPARSE_IRQ.
      
      This is a prerequisite for DT support.
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      dc8ef8cd
    • Linus Walleij's avatar
      ARM: ixp4xx: Pass IRQ resource to beeper · 075df31a
      Linus Walleij authored
      All IXP4xx devices except the beeper passes the IRQ as a
      resource, augment the NSLU2 beeper to do the same.
      
      This is a prerequisite for SPARSE_IRQ.
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      075df31a
    • Linus Walleij's avatar
      ARM: ixp4xx: Convert to MULTI_IRQ_HANDLER · 98ac0cc2
      Linus Walleij authored
      This rewrites the IXP4xx to use MULTI_IRQ_HANDLER and
      create an irqdomain for the irqchip in the platform. We
      convert the timer to request the interrupt like any other
      driver in the process.
      
      We bump all IRQs to 16+offset to avoid using IRQ 0 and
      set NR_IRQS to 512 (the default for most systems).
      This conveniently fits with the first 16 IRQs being
      pre-allocated when using SPARSE_IRQ.
      
      This is a prerequisite for SPARSE_IRQ and DT boot.
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      98ac0cc2
    • Linus Walleij's avatar
      ARM: ixp4xx: Add myself as maintainer · 64534e06
      Linus Walleij authored
      I am working on the platform right now so might as well
      maintain it for a bit.
      Suggested-by: default avatarKrzysztof Hałasa <khalasa@piap.pl>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      64534e06
  3. 17 Mar, 2019 12 commits