- 24 Nov, 2021 19 commits
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Luben Tuikov authored
Print the error on command submission immediately after submitting to the SMU. This is rate-limited. It helps to immediately know there was an error on command submission, rather than leave it up to clients to report the error, as sometimes they do not. Cc: Alex Deucher <Alexander.Deucher@amd.com> Signed-off-by:
Luben Tuikov <luben.tuikov@amd.com> Acked-by:
Alex Deucher <Alexander.Deucher@amd.com> Reviewed-by:
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Luben Tuikov authored
Add a print in sienna_cichlid_run_btc() to help debug and to mirror other platforms, as no print is present in the caller, smu_smc_hw_setup(). Cc: Alex Deucher <Alexander.Deucher@amd.com> Signed-off-by:
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Luben Tuikov authored
Add prints where there are none and none are printed in the callee. Remove the word "previous" from comment and print to make it shorter and avoid confusion in various prints. Cc: Alex Deucher <Alexander.Deucher@amd.com> Signed-off-by:
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Evan Quan authored
After switching to generic framebuffer framework, we rely on the ->dumb_create routine for frame buffer creation. However, the different domain flags used are not optimal. Add the contiguous flag to directly allocate the scanout BO as one linear buffer. Fixes: 087451f3 ("drm/amdgpu: use generic fb helpers instead of setting up AMD own's.") Signed-off-by:
Evan Quan <evan.quan@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Guchun Chen <guchun.chen@amd.com> Signed-off-by:
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Ramesh Errabolu authored
Fixes warning report from kernel test robot Reported-by:
kernel test robot <lkp@intel.com> Signed-off-by:
Ramesh Errabolu <Ramesh.Errabolu@amd.com> Reviewed-by:
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Alex Deucher authored
Renoir and newer gfx9 APUs have new TSC register that is not part of the gfxoff tile, so it can be read without needing to disable gfx off. Acked-by:
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Alex Deucher authored
Apply the same check we do for dGPUs for APUs as well. Acked-by:
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shaoyunl authored
Fixes: 9f4f2c1a ("drm/amd/amdgpu: fix the kfd pre_reset sequence in sriov") For sriov XGMI configuration, the host driver will handle the hive reset, so in guest side, the reset_sriov only be called once on one device. This will make kfd post_reset unblanced with kfd pre_reset since kfd pre_reset already been moved out of reset_sriov function. Move kfd post_reset out of reset_sriov function to make them balance . Signed-off-by:
shaoyunl <shaoyun.liu@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
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Aric Cyr authored
This version brings along the following: - FW promotion to 0.0.94 - Enable seamless boot for DCN301 - Improvements in bandwidth validation - Fixes in flags update, link encoder assignments, DSC, ODM combine and more Acked-by:
Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by:
Aric Cyr <aric.cyr@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
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Anthony Koo authored
[Why & How] - Remove tick count definition since it can be different per HW revision Acked-by:
Anthony Koo <Anthony.Koo@amd.com> Tested-by:
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Martin Leung authored
[Why & How] when changing some code we accidentally changed else if-> if. reverting that. Reviewed-by:
Martin Leung <Martin.Leung@amd.com> Tested-by:
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sungwang authored
[Why] When systme power up and eDP lit up by VBIOS, in the core_link_enable_stream(), the function will early return due to apply apply_edp_fast_boot_optimization, resulting the DP_PIXEL_COMBINE cannot get set in enc3_dp_set_odm_combine. [How] Check ODM PIPE to avoid early return. Reviewed-by:
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by:
Danny Wang <danny.wang@amd.com> Tested-by:
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Yi-Ling Chen authored
[WHY] Due to pass the wrong parameter down to the enable_stream_gating(), it would cause the DSC of the removing stream would not be PG. [HOW] To pass the correct parameter down th the enable_stream_gating(). Reviewed-by:
Yi-Ling Chen <Yi-Ling.Chen2@amd.com> Tested-by:
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Nevenko Stupar authored
[Why] display_object_info_table_v1_5 with atom_display_object_path_v3 will be used. [How] Add bios parser support for display_object_info_table_v1_5 with atom_display_object_path_v3 for all existing, in use bios records as well as for new records: ATOM_CONNECTOR_CAP_RECORD_TYPE, ATOM_CONNECTOR_SPEED_UPTO and ATOM_BRACKET_LAYOUT_V2_RECORD_TYPE. Reviewed-by:
Jun Lei <Jun.Lei@amd.com> Acked-by:
Nevenko Stupar <Nevenko.Stupar@amd.com> Tested-by:
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Mikita Lipski authored
[why/how] Fixing -Wint-in-bool-context Clang Build Failure Reviewed-by:
Nicholas Choi <Nicholas.Choi@amd.com> Acked-by:
Mikita Lipski <mikita.lipski@amd.com> Tested-by:
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Sung Joon Kim authored
[why] Need to keep track of number of references to stream pointer. [how] Call stream retain/release whenever necessary in link_enc table assignment sequence. Reviewed-by:
Sung Joon Kim <sungkim@amd.com> Tested-by:
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Zhan Liu authored
[Why] Rename function name so it aligns with other resource function names being used by dcn10. [How] Rename function name for consistency. Reviewed-by:
Ahmad Othman <Ahmad.Othman@amd.com> Acked-by:
Zhan Liu <Zhan.Liu@amd.com> Tested-by:
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Nicholas Kazlauskas authored
[Why] A warning appears in the log on GPU reset for link_enc_cfg_link_encs_assign for the following condition: ASSERT(state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].valid == false); This is not expected behavior and may result in link encoders being incorrectly assigned. [How] The dc->current_state is backed up into dm->cached_dc_state before we commit 0 streams. DC will clear link encoder assignments on the real state but the changes won't propagate over to the copy we made before the 0 streams commit. DC expects that link encoder assignments are *not* valid when committing a state, so as a workaround it needs to be cleared before passing it back into DC. Reviewed-by:
Harry Wentland <Harry.Wentland@amd.com> Acked-by:
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by:
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Guo, Bing authored
[Why] OPTC_BYTES_PER_PIXEL calculation for 4:2:2 and 4:2:0 could have error. [How] Change to use following formula: OPTC_DSC_BYTES_PER_PIXEL = ceiling((chunk size * 2^28) / slice width) v2: squash in 64 bit divide fix (Alex) Reviewed-by:
Wenjing Liu <Wenjing.Liu@amd.com> Acked-by:
Bing Guo <Bing.Guo@amd.com> Tested-by:
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- 22 Nov, 2021 21 commits
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Nicholas Kazlauskas authored
[Why] We're only setting the flags on stream[0]'s planes so this logic fails if we have more than one stream in the state. This can cause a page flip timeout with multiple displays in the configuration. [How] Index into the stream_status array using the stream index - it's a 1:1 mapping. Fixes: cdaae837 ("drm/amd/display: Handle GPU reset for DC block") Reviewed-by:
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Zhan Liu authored
[Why] DCN301 is capable of running seamless boot if keep_stolen_vga_memory is not set. [How] Add a helper to check whether an ASIC can support seamless boot and set it based on base driver flags. Reviewed-by:
Charlene Liu <Charlene.Liu@amd.com> Acked-by:
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Nicholas Kazlauskas authored
[Why] Dynamic link encoder assignment expects that it can modify DC current_state and the links associated with the incoming state when performing full validation. This does not align with our actual synchronization constraints in DM's atomic_check. [How] Since link encoder assignment only happens as part of full validation we can just use fast validation as part of atomic_check instead. This satisfy's DC interface requirements and skips the DML calculations needed for pipe programming - hopefully speeding up things a little bit to offset the cost of double validation during stream modification. We already do this as part of dc_commit_updates_for_stream() with validate_bandwidth(), so extend this to dc_commit_state() as well. Reviewed-by:
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Charlene Liu authored
[Why & How] Per hardware requirements, add a flag to control z10 enable/disable. Reviewed-by:
Sung joon Kim <Sungjoon.Kim@amd.com> Acked-by:
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Nicholas Kazlauskas authored
[Why] The HW interrupt gets disabled after GPU reset so we don't receive notifications for HPD or AUX from DMUB - leading to timeout and black screen with (or without) DPIA links connected. [How] Re-enable the interrupt after GPU reset like we do for the other DC interrupts. Fixes: 81927e28 ("drm/amd/display: Support for DMUB AUX") Reviewed-by:
Jude Shih <Jude.Shih@amd.com> Acked-by:
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xinhui pan authored
amdgpu_amdkfd_gpuvm_free_memory_of_gpu drop dmabuf reference increased in amdgpu_gem_prime_export. amdgpu_bo_destroy drop dmabuf reference increased in amdgpu_gem_prime_import. So remove this extra dma_buf_put to avoid double free. Signed-off-by:
xinhui pan <xinhui.pan@amd.com> Tested-by:
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Amber Lin authored
Remove unused entries in kfd_device_info table: num_xgmi_sdma_engines and num_sdma_queues_per_engine. They are calculated in kfd_get_num_sdma_engines and kfd_get_num_xgmi_sdma_engines instead. Signed-off-by:
Amber Lin <Amber.Lin@amd.com> Reviewed-by:
Graham Sider <Graham.Sider@amd.com> Signed-off-by:
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Andrey Grodzovsky authored
Add debugfs hook. Signed-off-by:
Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by:
Lijo Lazar <lijo.lazar@amd.com> Reviewed-by:
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Andrey Grodzovsky authored
Add STB implementation for sienna_cichlid Signed-off-by:
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Andrey Grodzovsky authored
Add interface to collect STB logs. Signed-off-by:
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Jiapeng Chong authored
Eliminate the follow smatch warning: drivers/gpu/drm/amd/amdgpu/../pm/powerplay/amd_powerplay.c:1554 pp_asic_reset_mode_2() warn: inconsistent indenting. Reported-by:
Abaci Robot <abaci@linux.alibaba.com> Signed-off-by:
Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by:
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Amber Lin authored
Instead of hard coding the number of sdma engines and the number of sdma_xgmi engines in the device_info table, get the number of toal SDMA instances from amdgpu. The first two engines are sdma engines and the rest are sdma-xgmi engines unless the ASIC doesn't support XGMI. v2: add kfd_ prefix to non static function names Signed-off-by:
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Felix Kuehling authored
Disable HDP register remapping on SRIOV and set rmmio_remap.reg_offset to the fixed address of the VF register for hdp_v*_flush_hdp. Signed-off-by:
Bokun Zhang <bokun.zhang@amd.com> Reviewed-by:
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Stanley.Yang authored
if smu support ECCTABLE, driver can message smu to get ecc_table then query umc error info from ECCTABLE v2: optimize source code makes logical more reasonable Signed-off-by:Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Stanley.Yang authored
support ECC TABLE message, this table include umc ras error count and error address v2: add smu version check to query whether support ecctable call smu_cmn_update_table to get ecctable directly Signed-off-by: -
Stanley.Yang authored
add message smu to query error information v2: rename message_smu to ecc_info Signed-off-by: -
Stanley.Yang authored
update smu driver if version to 0x08 to avoid mismatch log A version mismatch can still happen with an older FW Signed-off-by:
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Alex Deucher authored
Disable vblanks immediately to save power. I think this was missed when we merged DC support. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1781Reviewed-by:
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Yang Li authored
Clang static analysis reports this error drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:2870:7: warning: Dereference of null pointer [clang-analyzer-core.NullDereference] if (top_pipe_to_program->stream_res.tg->funcs->lock_doublebuffer_enable) { ^ top_pipe_to_program being NULL is caught as an error But then it is used to report the error. So add a check before using it. Reported-by:Yang Li <yang.lee@linux.alibaba.com> Signed-off-by:
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Bernard Zhao authored
In function dc_sink_destruct, kfree will check pointer, no need to check again. This change is to cleanup the code a bit. Acked-by:
Bernard Zhao <bernard@vivo.com> Signed-off-by:
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Bernard Zhao authored
This change is to cleanup the code a bit. Acked-by:
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