- 22 Apr, 2013 8 commits
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Abel Gordon authored
Unmap vmcs12 and release the corresponding shadow vmcs Signed-off-by:
Abel Gordon <abelg@il.ibm.com> Reviewed-by:
Orit Wasserman <owasserm@redhat.com> Signed-off-by:
Gleb Natapov <gleb@redhat.com>
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Abel Gordon authored
Allocate a shadow vmcs used by the processor to shadow part of the fields stored in the software defined VMCS12 (let L1 access fields without causing exits). Note we keep a shadow vmcs only for the current vmcs12. Once a vmcs12 becomes non-current, its shadow vmcs is released. Signed-off-by:
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Abel Gordon authored
handle_vmon doesn't check if L1 is already in root mode (VMXON was previously called). This patch adds this missing check and calls nested_vmx_failValid if VMX is already ON. We need this check because L0 will allocate the shadow vmcs when L1 executes VMXON and we want to avoid host leaks (due to shadow vmcs allocation) if L1 executes VMXON repeatedly. Signed-off-by:
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Abel Gordon authored
Refactor existent code so we re-use vmcs12_write_any to copy fields from the shadow vmcs specified by the link pointer (used by the processor, implementation-specific) to the VMCS12 software format used by L0 to hold the fields in L1 memory address space. Signed-off-by:
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Abel Gordon authored
Prepare vmread and vmwrite bitmaps according to a pre-specified list of fields. These lists are intended to specifiy most frequent accessed fields so we can minimize the number of fields that are copied from/to the software controlled VMCS12 format to/from to processor-specific shadow vmcs. The lists were built measuring the VMCS fields access rate after L2 Ubuntu 12.04 booted when it was running on top of L1 KVM, also Ubuntu 12.04. Note that during boot there were additional fields which were frequently modified but they were not added to these lists because after boot these fields were not longer accessed by L1. Signed-off-by:
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Abel Gordon authored
Add logic required to detect if shadow-vmcs is supported by the processor. Introduce a new kernel module parameter to specify if L0 should use shadow vmcs (or not) to run L1. Signed-off-by:
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Abel Gordon authored
Add definitions for all the vmcs control fields/bits required to enable vmcs-shadowing Signed-off-by:
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- 18 Apr, 2013 2 commits
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Yang Zhang authored
Fix the compile error with kvm_vm_ioctl_irq_line. Signed-off-by:
Yang Zhang <yang.z.zhang@Intel.com> Signed-off-by:
Marcelo Tosatti <mtosatti@redhat.com>
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Zhang, Yang Z authored
->send_IPI_mask is not defined on UP. Signed-off-by:
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- 17 Apr, 2013 4 commits
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Scott Wood authored
complete_mmio_load writes back the mmio result into the destination register. Doing this on a store results in register corruption. Signed-off-by:
Scott Wood <scottwood@freescale.com> Signed-off-by:
Alexander Graf <agraf@suse.de>
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Stuart Yoder authored
Signed-off-by:
Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by:
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Bharat Bhushan authored
This patch adds the one_reg interface to get the special instruction to be used for setting software breakpoint from userspace. Signed-off-by:
Bharat Bhushan <bharat.bhushan@freescale.com> Signed-off-by:
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Alexander Graf authored
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- 16 Apr, 2013 17 commits
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Gleb Natapov authored
If guest vcpu is in VM86 mode the vcpu state should be checked as if in real mode. Signed-off-by:
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Paolo Bonzini authored
KVM does not use the activity state VMCS field, and does not support it in nested VMX either (the corresponding bits in the misc VMX feature MSR are zero). Fail entry if the activity state is set to anything but "active". Since the value will always be the same for L1 and L2, we do not need to read and write the corresponding VMCS field on L1/L2 transitions, either. Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com> Reviewed-by:
Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by:
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Alexander Graf authored
Commit aa2fbe6d broke the ARM KVM target by introducing a new parameter to irq handling functions. Fix the function prototype to get things compiling again and ignore the parameter just like we did before Signed-off-by:
Christoffer Dall <cdall@cs.columbia.edu> Signed-off-by:
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Yang Zhang authored
If posted interrupt is avaliable, then uses it to inject virtual interrupt to guest. Signed-off-by:
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Yang Zhang authored
Only deliver the posted interrupt when target vcpu is running and there is no previous interrupt pending in pir. Signed-off-by:
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Yang Zhang authored
We already know the trigger mode of a given interrupt when programming the ioapice entry. So it's not necessary to set it in each interrupt delivery. Signed-off-by:
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Yang Zhang authored
Both TMR and EOI exit bitmap need to be updated when ioapic changed or vcpu's id/ldr/dfr changed. So use common function instead eoi exit bitmap specific function. Signed-off-by:
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Yang Zhang authored
Detect the posted interrupt feature. If it exists, then set it in vmcs_config. Signed-off-by:
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Yang Zhang authored
Posted Interrupt feature requires a special IPI to deliver posted interrupt to guest. And it should has a high priority so the interrupt will not be blocked by others. Normally, the posted interrupt will be consumed by vcpu if target vcpu is running and transparent to OS. But in some cases, the interrupt will arrive when target vcpu is scheduled out. And host will see it. So we need to register a dump handler to handle it. Signed-off-by:
Ingo Molnar <mingo@kernel.org> Reviewed-by:
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Yang Zhang authored
The "acknowledge interrupt on exit" feature controls processor behavior for external interrupt acknowledgement. When this control is set, the processor acknowledges the interrupt controller to acquire the interrupt vector on VM exit. After enabling this feature, an interrupt which arrived when target cpu is running in vmx non-root mode will be handled by vmx handler instead of handler in idt. Currently, vmx handler only fakes an interrupt stack and jump to idt table to let real handler to handle it. Further, we will recognize the interrupt and only delivery the interrupt which not belong to current vcpu through idt table. The interrupt which belonged to current vcpu will be handled inside vmx handler. This will reduce the interrupt handle cost of KVM. Also, interrupt enable logic is changed if this feature is turnning on: Before this patch, hypervior call local_irq_enable() to enable it directly. Now IF bit is set on interrupt stack frame, and will be enabled on a return from interrupt handler if exterrupt interrupt exists. If no external interrupt, still call local_irq_enable() to enable it. Refer to Intel SDM volum 3, chapter 33.2. Signed-off-by:
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Yang Zhang authored
Current interrupt coalescing logci which only used by RTC has conflict with Posted Interrupt. This patch introduces a new mechinism to use eoi to track interrupt: When delivering an interrupt to vcpu, the pending_eoi set to number of vcpu that received the interrupt. And decrease it when each vcpu writing eoi. No subsequent RTC interrupt can deliver to vcpu until all vcpus write eoi. Signed-off-by:
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Yang Zhang authored
Userspace may deliver RTC interrupt without query the status. So we want to track RTC EOI for this case. Signed-off-by:
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Yang Zhang authored
Need the EOI to track interrupt deliver status, so force vmexit on EOI for rtc interrupt when enabling virtual interrupt delivery. Signed-off-by:
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Yang Zhang authored
restore rtc_status from migration or save/restore Signed-off-by:
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Yang Zhang authored
Add a new parameter to know vcpus who received the interrupt. Signed-off-by:
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Yang Zhang authored
rtc_status is used to track RTC interrupt delivery status. The pending_eoi will be increased by vcpu who received RTC interrupt and will be decreased when EOI to this interrupt. Also, we use dest_map to record the destination vcpu to avoid the case that vcpu who didn't get the RTC interupt, but issued EOI with same vector of RTC and descreased pending_eoi by mistake. Signed-off-by:
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Yang Zhang authored
Add vcpu info to ioapic_update_eoi, so we can know which vcpu issued this EOI. Signed-off-by:
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- 14 Apr, 2013 8 commits
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Jan Kiszka authored
We only need to update vm_exit_intr_error_code if there is a valid exit interruption information and it comes with a valid error code. Signed-off-by:
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Jan Kiszka authored
If we are entering guest mode, we do not want L0 to interrupt this vmentry with all its side effects on the vmcs. Therefore, injection shall be disallowed during L1->L2 transitions, as in the previous version. However, this check is conceptually independent of nested_exit_on_intr, so decouple it. If L1 traps external interrupts, we can kick the guest from L2 to L1, also just like the previous code worked. But we no longer need to consider L1's idt_vectoring_info_field. It will always be empty at this point. Instead, if L2 has pending events, those are now found in the architectural queues and will, thus, prevent vmx_interrupt_allowed from being called at all. Signed-off-by:
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Jan Kiszka authored
The basic idea is to always transfer the pending event injection on vmexit into the architectural state of the VCPU and then drop it from there if it turns out that we left L2 to enter L1, i.e. if we enter prepare_vmcs12. vmcs12_save_pending_events takes care to transfer pending L0 events into the queue of L1. That is mandatory as L1 may decide to switch the guest state completely, invalidating or preserving the pending events for later injection (including on a different node, once we support migration). This concept is based on the rule that a pending vmlaunch/vmresume is not canceled. Otherwise, we would risk to lose injected events or leak them into the wrong queues. Encode this rule via a WARN_ON_ONCE at the entry of nested_vmx_vmexit. Signed-off-by:
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Jan Kiszka authored
Check if the interrupt or NMI window exit is for L1 by testing if it has the corresponding controls enabled. This is required when we allow direct injection from L0 to L2 Signed-off-by:
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Gleb Natapov authored
Signed-off-by: -
Gleb Natapov authored
Emulation of undefined opcode should inject #UD instead of causing emulation failure. Do that by moving Undefined flag check to emulation stage and injection #UD there. Signed-off-by: -
Gleb Natapov authored
During invalid guest state emulation vcpu cannot enter guest mode to try to reexecute instruction that emulator failed to emulate, so emulation will happen again and again. Prevent that by telling the emulator that instruction reexecution should not be attempted. Signed-off-by: -
Gleb Natapov authored
Unimplemented instruction detection is broken for group instructions since it relies on "flags" field of opcode to be zero, but all instructions in a group inherit flags from a group encoding. Fix that by having a separate flag for unimplemented instructions. Signed-off-by:
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- 11 Apr, 2013 1 commit
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Kevin Wolf authored
This fixes a regression introduced in commit 03ebebeb ("KVM: x86 emulator: Leave segment limit and attributs alone in real mode"). The mentioned commit changed the segment descriptors for both real mode and VM86 to only update the segment base instead of creating a completely new descriptor with limit 0xffff so that unreal mode keeps working across a segment register reload. This leads to an invalid segment descriptor in the eyes of VMX, which seems to be okay for real mode because KVM will fix it up before the next VM entry or emulate the state, but it doesn't do this if the guest is in VM86, so we end up with: KVM: entry failed, hardware error 0x80000021 Fix this by effectively reverting commit 03ebebeb for VM86 and leaving it only in place for real mode, which is where it's really needed. Signed-off-by:
Kevin Wolf <kwolf@redhat.com> Signed-off-by:
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