- 03 Sep, 2024 13 commits
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Jens Wiklander authored
Prevent build error when CONFIG_RPMB=m and CONFIG_OPTEE=y by adding a dependency to CONFIG_RPMB for CONFIG_OPTEE so the RPMB subsystem always is reachable if configured. This means that CONFIG_OPTEE automatically becomes compiled as a module if CONFIG_RPMB is compiled as a module. If CONFIG_RPMB isn't configured or is configured as built-in, CONFIG_OPTEE will remain unchanged. Reported-by:
kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202409021448.RSvcBPzt-lkp@intel.com/ Fixes: f0c84315 ("optee: probe RPMB device using RPMB subsystem") Signed-off-by:
Jens Wiklander <jens.wiklander@linaro.org> Link: https://lore.kernel.org/r/20240902151231.3705204-2-jens.wiklander@linaro.orgSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Jens Wiklander authored
Prevent build error when CONFIG_RPMB=m and CONFIG_MMC_BLOCK=y by adding a dependency to CONFIG_RPMB for CONFIG_MMC_BLOCK block so the RPMB subsystem always is reachable if configured. This means that CONFIG_MMC_BLOCK automatically becomes compiled as a module if CONFIG_RPMB is compiled as a module. If CONFIG_RPMB isn't configured or is configured as built-in, CONFIG_MMC_BLOCK will remain unchanged. Reported-by:
Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20240902151231.3705204-1-jens.wiklander@linaro.orgSigned-off-by:
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Avri Altman authored
The UNSTUFF_BITS macro, which is defined in both drivers/mmc/core/mmc.c and drivers/mmc/core/sd.c, has been converted to an inline function to improve readability, maintainability, and type safety. Signed-off-by:
Avri Altman <avri.altman@wdc.com> Link: https://lore.kernel.org/r/20240902123331.3566447-1-avri.altman@wdc.comSigned-off-by:
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Dharma Balasubiramani authored
Convert sdhci-atmel documentation to yaml format. The new file will inherit from sdhci-common.yaml. Note: Add microchip,sama7g5-sdhci to compatible list as we already use it in the DT. Signed-off-by:
Dharma Balasubiramani <dharma.b@microchip.com> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240902-atmel-sdhci-v4-1-96912fab6b2d@microchip.comSigned-off-by:
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Riyan Dhiman authored
simple_strtoul() is obsolete and lacks proper error handling, making it unsafe for converting strings to unsigned long values. Replace it with kstrtoul(), which provides robust error checking and better safety. This change improves the reliability of the string-to-integer conversion and aligns with current kernel coding standards. Error handling is added to catch conversion failures, returning -EINVAL when input is invalid. Issue reported by checkpatch: - WARNING: simple_strtoul is obsolete, use kstrtoul instead Signed-off-by:
Riyan Dhiman <riyandhiman14@gmail.com> Link: https://lore.kernel.org/r/20240901182244.45543-1-riyandhiman14@gmail.comSigned-off-by:
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Riyan Dhiman authored
Calculate the size from pointer instead of struct to adhere to linux kernel coding style. Issue reported by checkpatch. This commit has no functional changes. Signed-off-by:
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Seunghwan Baek authored
Make use of cqhci_halted() in couple places to avoid open-coding. Signed-off-by:
Seunghwan Baek <sh8267.baek@samsung.com> Reviewed-by:
Ritesh Harjani <ritesh.list@gmail.com> Acked-by:
Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20240829061823.3718-3-sh8267.baek@samsung.comSigned-off-by:
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Ulf Hansson authored
Merge the mmc fixes for v6.11-rc[n] into the next branch, to allow them to get tested together with the new mmc changes that are targeted for v6.12. Signed-off-by: -
Seunghwan Baek authored
To check if mmc cqe is in halt state, need to check set/clear of CQHCI_HALT bit. At this time, we need to check with &, not &&. Fixes: a4080225 ("mmc: cqhci: support for command queue enabled host") Cc: stable@vger.kernel.org Signed-off-by:
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Chanwoo Lee authored
Replace with already defined values for readability. While at it, let's also change the mode-parameter from an int to bool, as the only used values are 0 or 1. Signed-off-by:
Chanwoo Lee <cw9316.lee@samsung.com> Link: https://lore.kernel.org/r/20240829024709.402285-1-cw9316.lee@samsung.comSigned-off-by:
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Detlev Casanova authored
On rk3576 the tunable clocks are inside the controller itself, removing the need for the "ciu-drive" and "ciu-sample" clocks. That makes it a new type of controller that has its own dt_parse function. Signed-off-by:
Detlev Casanova <detlev.casanova@collabora.com> Reviewed-by:
Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/010201919997044d-c3a008d1-afbc-462f-a928-fc1ece785bdb-000000@eu-west-1.amazonses.comSigned-off-by:
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Shawn Lin authored
Some Rockchip devices put the phase settings into the dw_mmc controller. When the feature is present, the ciu-drive and ciu-sample clocks are not used and the phase configuration is done directly through the mmc controller. Signed-off-by:
Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by:
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Detlev Casanova authored
Add the compatible string for rockchip,rk3576-dw-mshc in its own new block, for devices that have internal phase settings instead of external clocks. Signed-off-by:
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- 28 Aug, 2024 4 commits
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Ulf Hansson authored
Merge the mmc fixes for v6.11-rc[n] into the next branch, to allow them to get tested together with the new mmc changes that are targeted for v6.12. Signed-off-by: -
Sam Protsenko authored
Commit 616f8766 ("mmc: pass queue_limits to blk_mq_alloc_disk") [1] revealed the long living issue in dw_mmc.c driver, existing since the time when it was first introduced in commit f95f3850 ("mmc: dw_mmc: Add Synopsys DesignWare mmc host driver."), also making kernel boot broken on platforms using dw_mmc driver with 16K or 64K pages enabled, with this message in dmesg: mmcblk: probe of mmc0:0001 failed with error -22 That's happening because mmc_blk_probe() fails when it calls blk_validate_limits() consequently, which returns the error due to failed max_segment_size check in this code: /* * The maximum segment size has an odd historic 64k default that * drivers probably should override. Just like the I/O size we * require drivers to at least handle a full page per segment. */ ... if (WARN_ON_ONCE(lim->max_segment_size < PAGE_SIZE)) return -EINVAL; In case when IDMAC (Internal DMA Controller) is used, dw_mmc.c always sets .max_seg_size to 4 KiB: mmc->max_seg_size = 0x1000; The comment in the code above explains why it's incorrect. Arnd suggested setting .max_seg_size to .max_req_size to fix it, which is also what some other drivers are doing: $ grep -rl 'max_seg_size.*=.*max_req_size' drivers/mmc/host/ | \ wc -l 18 This change is not only fixing the boot with 16K/64K pages, but also leads to a better MMC performance. The linear write performance was tested on E850-96 board (eMMC only), before commit [1] (where it's possible to boot with 16K/64K pages without this fix, to be able to do a comparison). It was tested with this command: # dd if=/dev/zero of=somefile bs=1M count=500 oflag=sync Test results are as follows: - 4K pages, .max_seg_size = 4 KiB: 94.2 MB/s - 4K pages, .max_seg_size = .max_req_size = 512 KiB: 96.9 MB/s - 16K pages, .max_seg_size = 4 KiB: 126 MB/s - 16K pages, .max_seg_size = .max_req_size = 2 MiB: 128 MB/s - 64K pages, .max_seg_size = 4 KiB: 138 MB/s - 64K pages, .max_seg_size = .max_req_size = 8 MiB: 138 MB/s Unfortunately, SD card controller is not enabled in E850-96 yet, so it wasn't possible for me to run the test on some cheap SD cards to check this patch's impact on those. But it's possible that this change might also reduce the writes count, thus improving SD/eMMC longevity. All credit for the analysis and the suggested solution goes to Arnd. [1] https://lore.kernel.org/all/20240215070300.2200308-18-hch@lst.de/ Fixes: f95f3850 ("mmc: dw_mmc: Add Synopsys DesignWare mmc host driver.") Suggested-by:
Linux Kernel Functional Testing <lkft@linaro.org> Closes: https://lore.kernel.org/all/CA+G9fYtddf2Fd3be+YShHP6CmSDNcn0ptW8qg+stUKW+Cn0rjQ@mail.gmail.com/Signed-off-by:
Sam Protsenko <semen.protsenko@linaro.org> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20240306232052.21317-1-semen.protsenko@linaro.orgSigned-off-by:
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Liming Sun authored
The eMMC RST_N register is implemented as secure register on the BlueField-3 SoC and controlled by TF-A. This commit adds the hw_reset() support which sends an SMC call to TF-A for the eMMC HW reset. Reviewed-by:
David Thompson <davthompson@nvidia.com> Signed-off-by:
Liming Sun <limings@nvidia.com> Link: https://lore.kernel.org/r/20240827164016.237617-1-limings@nvidia.comSigned-off-by:
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Liao Chen authored
Add MODULE_DEVICE_TABLE(), so modules could be properly autoloaded based on the alias from of_device_id table. Signed-off-by:
Liao Chen <liaochen4@huawei.com> Acked-by:
Andrew Jeffery <andrew@codeconstruct.com.au> Fixes: bb7b8ec6 ("mmc: sdhci-of-aspeed: Add support for the ASPEED SD controller") Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20240826124851.379759-1-liaochen4@huawei.comSigned-off-by:
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- 26 Aug, 2024 23 commits
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Vladimir Zapolskiy authored
The last users of 'enum mmc_blk_status' and 'struct mmc_async_req' were removed by commit 126b6270 ("mmc: core: Remove code no longer needed after the switch to blk-mq") in 2017, remove these two left-over data structures. Signed-off-by:
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Link: https://lore.kernel.org/r/20240823225917.2826156-1-vladimir.zapolskiy@linaro.orgSigned-off-by:
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Christophe JAILLET authored
The 'mmc_context_info' structure is unused. It has been introduced in: - commit 2220eedf ("mmc: fix async request mechanism for sequential read scenarios") in 2013-02 and its usages have been removed in: - commit 126b6270 ("mmc: core: Remove code no longer needed after the switch to blk-mq") - commit 0fbfd125 ("mmc: block: Remove code no longer needed after the switch to blk-mq") in 2017-12. Now remove this unused structure. Signed-off-by:
Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by:
Vladimir Zapolskiy <vz@mleia.com> Link: https://lore.kernel.org/r/232106a8a6a374dee25feea9b94498361568c10b.1724246389.git.christophe.jaillet@wanadoo.frSigned-off-by:
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Jens Wiklander authored
Adds support in the OP-TEE drivers (both SMC and FF-A ABIs) to probe and use an RPMB device via the RPMB subsystem instead of passing the RPMB frames via tee-supplicant in user space. A fallback mechanism is kept to route RPMB frames via tee-supplicant if the RPMB subsystem isn't available. The OP-TEE RPC ABI is extended to support iterating over all RPMB devices until one is found with the expected RPMB key already programmed. Signed-off-by:
Manuel Traut <manut@mecka.net> Reviewed-by:
Sumit Garg <sumit.garg@linaro.org> Link: https://lore.kernel.org/r/20240814153558.708365-5-jens.wiklander@linaro.orgSigned-off-by:
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Jens Wiklander authored
Add tee_device_set_dev_groups() to TEE drivers to supply driver specific attribute groups. The class specific attributes are from now on added via the tee_class, which currently only consist of implementation_id. Signed-off-by:
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Jens Wiklander authored
Register eMMC RPMB partition with the RPMB subsystem and provide an implementation for the RPMB access operations abstracting the actual multi step process. Add a callback to extract the needed device information at registration to avoid accessing the struct mmc_card at a later stage as we're not holding a reference counter for this struct. Taking the needed reference to md->disk in mmc_blk_alloc_rpmb_part() instead of in mmc_rpmb_chrdev_open(). This is needed by the route_frames() function pointer in struct rpmb_ops. Signed-off-by:
Tomas Winkler <tomas.winkler@intel.com> Signed-off-by:
Alexander Usyskin <alexander.usyskin@intel.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Reviewed-by:
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Jens Wiklander authored
A number of storage technologies support a specialised hardware partition designed to be resistant to replay attacks. The underlying HW protocols differ but the operations are common. The RPMB partition cannot be accessed via standard block layer, but by a set of specific RPMB commands. Such a partition provides authenticated and replay protected access, hence suitable as a secure storage. The initial aim of this patch is to provide a simple RPMB driver interface which can be accessed by the optee driver to facilitate early RPMB access to OP-TEE OS (secure OS) during the boot time. A TEE device driver can claim the RPMB interface, for example, via rpmb_interface_register() or rpmb_dev_find_device(). The RPMB driver provides a callback to route RPMB frames to the RPMB device accessible via rpmb_route_frames(). The detailed operation of implementing the access is left to the TEE device driver itself. Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Signed-off-by:
Shyam Saini <shyamsaini@linux.microsoft.com> Signed-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://lore.kernel.org/r/20240814153558.708365-2-jens.wiklander@linaro.orgSigned-off-by:
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Ulf Hansson authored
Merge the mmc fixes for v6.11-rc[n] into the next branch, to allow them to get tested together with the new mmc changes that are targeted for v6.12. Signed-off-by: -
Jonathan Bell authored
Applying MMC_QUIRK_BROKEN_SD_CACHE is broken, as the card's SD quirks are referenced in sd_parse_ext_reg_perf() prior to the quirks being initialized in mmc_blk_probe(). To fix this problem, let's split out an SD-specific list of quirks and apply in mmc_sd_init_card() instead. In this way, sd_read_ext_regs() to has the available information for not assigning the SD_EXT_PERF_CACHE as one of the (un)supported features, which in turn allows mmc_sd_init_card() to properly skip execution of sd_enable_cache(). Fixes: c467c8f0 ("mmc: Add MMC_QUIRK_BROKEN_SD_CACHE for Kingston Canvas Go Plus from 11/2019") Signed-off-by:
Jonathan Bell <jonathan@raspberrypi.com> Co-developed-by:
Keita Aihara <keita.aihara@sony.com> Signed-off-by:
Dragan Simic <dsimic@manjaro.org> Reviewed-by:
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Krzysztof Kozlowski authored
Properties with variable number of items per each device are expected to have widest constraints in top-level "properties:" block and further customized (narrowed) in "if:then:". Add missing top-level constraints for clocks. Signed-off-by:
Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20240818172923.121867-1-krzysztof.kozlowski@linaro.orgSigned-off-by:
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Thorsten Blum authored
The local variable clk_ns uses at most 32 bits and can be a u32. Replace the 64-by-32 do_div() division with a standard divison. Since do_div() casts the divisor to u32 anyway, changing the data type of clk_ns to u32 also removes the following Coccinelle/coccicheck warning reported by do_div.cocci: WARNING: do_div() does a 64-by-32 division, please consider using div64_u64 instead Use min_t(u32,,) to simplify the code and improve its readability. Signed-off-by:
Thorsten Blum <thorsten.blum@toblux.com> Link: https://lore.kernel.org/r/20240818142300.64156-2-thorsten.blum@toblux.comSigned-off-by:
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Lad Prabhakar authored
Remove the duplicate compatible entry `renesas,sdhi-r9a09g057` and add a restriction for clocks and clock-names for the RZ/V2H(P) SoC, which has four clocks similar to the RZ/G2L SoC. Reported-by:
Geert Uytterhoeven <geert@linux-m68k.org> Fixes: 32842af74abc ("dt-bindings: mmc: renesas,sdhi: Document RZ/V2H(P) support") Signed-off-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by:
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Chen Wang authored
Add support for the mmc controller of Sophgo SG2042. SG2042 uses Synopsys PHY the same as TH1520 so we reuse the tuning logic from TH1520. Besides this, this patch implement some SG2042 specific work, such as clocks and reset ops. Signed-off-by:
Chen Wang <unicorn_wang@outlook.com> Acked-by:
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Chen Wang authored
SG2042 use Synopsys dwcnshc IP for SD/eMMC controllers. SG2042 defines 3 clocks for SD/eMMC controllers. - EMMC_100M/SD_100M for cclk(Card clocks in DWC_mshc), so reuse existing "core". - AXI_EMMC/AXI_SD for aclk/hclk(Bus interface clocks in DWC_mshc) and blck(Core Base Clock in DWC_mshc), these 3 clocks share one source, so reuse existing "bus". - 100K_EMMC/100K_SD for cqetmclk(Timer clocks in DWC_mshc), so reuse existing "timer" which was added for rockchip specified. Signed-off-by:
Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/9ca450097e5389a38bcd7d8ddf863766df4cea10.1722847198.git.unicorn_wang@outlook.comSigned-off-by:
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Chen Wang authored
Abstract dwcmshc_pltfm_data to hold the sdhci_pltfm_data plus some comoon operations of soc such as init/postinit. Signed-off-by:
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Chen Wang authored
Continue factor out code fron probe into dwcmshc_rk35xx_init. Signed-off-by:
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Chen Wang authored
Different socs have initialization operations in the probe process, which are summarized as functions. This patch first factor out init function for th1520. Signed-off-by:
Drew Fustini <drew@pdp7.com> Tested-by: Drew Fustini <drew@pdp7.com> # TH1520 Tested-by: Inochi Amaoto <inochiama@outlook.com> # Duo and Huashan Pi Acked-by:
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Chen Wang authored
This patch just move dwcmshc_rk35xx_init() and dwcmshc_rk35xx_postinit() to put the functions of rk35xx together as much as possible. This change is an intermediate process before further modification. Signed-off-by:
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Chen Wang authored
In addition to the required core clock and optional bus clock, the soc will expand its own clocks, so the bulk clock mechanism is abstracted. Note, I call the bulk clocks as "other clocks" due to the bus clock has been called as "optional". Signed-off-by:
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Lad Prabhakar authored
The SD/MMC block on the RZ/V2H(P) ("R9A09G057") SoC is similar to that of the R-Car Gen3, but it has some differences: - HS400 is not supported. - It has additional SD_STATUS register to control voltage, power enable and reset. - It supports fixed address mode. To accommodate these differences, a SoC-specific 'renesas,sdhi-r9a09g057' compatible string is added. Note for RZ/V2H(P), we are using the `of_rzg2l_compatible` OF data as it already handles no HS400 and fixed address mode support. Since the SDxIOVS and SDxPWEN pins can always be used as GPIO pins on the RZ/V2H(P) SoC, no driver changes are done to control the SD_STATUS register. Signed-off-by: -
Lad Prabhakar authored
Use the mmc_regulator_enable_vqmmc() and mmc_regulator_disable_vqmmc() APIs to enable/disable the vqmmc regulator. Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> # on RZ/G3S Link: https://lore.kernel.org/r/20240724182119.652080-3-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by:
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Lad Prabhakar authored
The SD/MMC block on the RZ/V2H(P) ("R9A09G057") SoC is similar to that of the R-Car Gen3, but it has some differences: - HS400 is not supported. - It has additional SD_STATUS register to control voltage, power enable and reset. - It supports fixed address mode. To accommodate these differences, a SoC-specific 'renesas,sdhi-r9a09g057' compatible string is added. Signed-off-by: -
Doug Brown authored
There is no need to check for a null mrq->cmd in pxav1_request_done. mmc_request_done already assumes it's not null, and it's always called in this path by every SDHCI driver. This was caught by Smatch. Reported-by:
Dan Carpenter <dan.carpenter@linaro.org> Closes: https://lore.kernel.org/all/9ddaef2a-05bb-4fe7-98c5-da40a0813027@stanley.mountain/Signed-off-by:
Doug Brown <doug@schmorgal.com> Acked-by:
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Shan-Chun Hung authored
Add the SDHCI driver for the MA35D1 platform. It is based upon the SDHCI interface, but requires some extra initialization. Signed-off-by:
Shan-Chun Hung <shanchun1218@gmail.com> Acked-by:
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