- 20 Sep, 2022 31 commits
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Johan Hovold authored
The PCS_USB register block lives at an offset of 0x300 from the PCS region on SC8280XP so add the missing offset to avoid corrupting unrelated registers on runtime suspend. Note that this region should probably be described separately in the binding. Fixes: a2e927b0 ("phy: qcom-qmp-combo: Add sc8280xp USB/DP combo phys") Signed-off-by:
Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20220919095700.2228-1-johan+linaro@kernel.orgSigned-off-by:
Vinod Koul <vkoul@kernel.org>
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Chris Morgan authored
Add support for the Rockchip RK3568 DSI-DPHY. Registers were taken from the BSP kernel driver and wherever possible cross referenced with the TRM. Refactor the code to allow the different compatible strings to set either a max 1GHz timing table (all existing hardware) or a max 2.5GHz timing table (the new RK356x). This works (for me) on both an RK3326 (PX30) and a new RK3566 device. Signed-off-by:
Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20220919164616.12492-3-macroalpha82@gmail.comSigned-off-by:
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Chris Morgan authored
Add a compatible string for the rk3568 dsi-dphy. Signed-off-by:
Rob Herring <robh@kernel.org> Reviewed-by:
Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20220919164616.12492-2-macroalpha82@gmail.comSigned-off-by:
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Iskren Chernev authored
The Sm6115 UFS PHY has 2 clocks and 3 regs. Signed-off-by:
Iskren Chernev <iskren.chernev@gmail.com> Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220919180618.1840194-6-iskren.chernev@gmail.comSigned-off-by:
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Johan Hovold authored
Commit 5e17b95d ("phy: qcom-qmp: Utilize fully-specified DT registers") added a workaround for legacy devicetrees which did not specify register regions for the second lane of some dual-lane PHYs. At the time, the only two dual-lane PHYs supported by mainline were "qcom,sdm845-qmp-usb3-phy" and "qcom,sdm845-qmp-ufs-phy" and they had been added to the binding less than six months before the binding was fixed. Presumably no one is using four-year old SDM845 dtbs with mainline anymore so drop the workaround for malformed devicetrees. In the unlikely event that anyone complains, we can consider reverting. Signed-off-by:
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Johan Hovold authored
Commit 5e17b95d ("phy: qcom-qmp: Utilize fully-specified DT registers") added a workaround for legacy devicetrees which did not specify register regions for the second lane of some dual-lane PHYs. At the time, the only two dual-lane PHYs supported by mainline were "qcom,sdm845-qmp-usb3-phy" and "qcom,sdm845-qmp-ufs-phy" and they had been added to the binding less than six months before the binding was fixed. Presumably no one is using four-year old SDM845 dtbs with mainline anymore so drop the workaround for malformed devicetrees. In the unlikely event that anyone complains, we can consider reverting. Signed-off-by:
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Johan Hovold authored
Commit 5e17b95d ("phy: qcom-qmp: Utilize fully-specified DT registers") added a workaround for legacy devicetrees which did not specify register regions for the second lane of some dual-lane PHYs. At the time, the only two dual-lane PHYs supported by mainline were "qcom,sdm845-qmp-usb3-phy" and "qcom,sdm845-qmp-ufs-phy", neither of which is a combo PHY. Drop the workaround for malformed devicetrees, which should no longer be needed since the QMP driver split. Signed-off-by:
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Johan Hovold authored
Commit 5e17b95d ("phy: qcom-qmp: Utilize fully-specified DT registers") added a workaround for legacy devicetrees which did not specify register regions for the second lane of some dual-lane PHYs. At the time, the only two dual-lane PHYs supported by mainline were "qcom,sdm845-qmp-usb3-phy" and "qcom,sdm845-qmp-ufs-phy", neither of which is a PCIe PHY. Drop the workaround for malformed devicetrees, which should no longer be needed since the QMP driver split. Signed-off-by:
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Johan Hovold authored
The MSM8996 QMP PHY driver does not use the PCS_MISC IO region (and neither do the DT binding specify it) so remove the corresponding code from the driver. Signed-off-by:
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Johan Hovold authored
Switch to using the device-managed of_iomap helper to avoid leaking memory on probe deferral and driver unbind. Note that this helper checks for already reserved regions and may fail if there are multiple devices claiming the same memory. Two bindings currently rely on overlapping mappings for the PCS region so fallback to non-exclusive mappings for those for now. Fixes: e78f3d15 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets") Signed-off-by:
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Johan Hovold authored
Switch to using the device-managed of_iomap helper to avoid leaking memory on probe deferral and driver unbind. Note that this helper checks for already reserved regions and may fail if there are multiple devices claiming the same memory. Fixes: e78f3d15 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets") Signed-off-by:
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Johan Hovold authored
Switch to using the device-managed of_iomap helper to avoid leaking memory on probe deferral and driver unbind. Note that this helper checks for already reserved regions and may fail if there are multiple devices claiming the same memory. Fixes: e78f3d15 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets") Signed-off-by:
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Johan Hovold authored
Switch to using the device-managed of_iomap helper to avoid leaking memory on probe deferral and driver unbind. Note that this helper checks for already reserved regions and may fail if there are multiple devices claiming the same memory. Fixes: e78f3d15 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets") Signed-off-by:
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Johan Hovold authored
Switch to using the device-managed of_iomap helper to avoid leaking memory on probe deferral and driver unbind. Note that this helper checks for already reserved regions and may fail if there are multiple devices claiming the same memory. Fixes: e78f3d15 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets") Signed-off-by:
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Johan Hovold authored
Make sure that the (otherwise) optional pcs_misc IO region has been provided in case the configuration specifies a corresponding initialisation table to avoid crashing with malformed device trees. Note that the related debug message is now superfluous as the region is only used when the configuration has a pcs_misc table. Fixes: 421c9a0e ("phy: qcom: qmp: Add SDM845 PCIe QMP PHY support") Signed-off-by:
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Johan Hovold authored
The driver function prefix has gotten unnecessarily long and hurts readability. Shorten "qcom_qmp_phy_" to "qmp_" (which likely stands for "Qualcomm Multi PHY" or similar anyway). Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220907110728.19092-17-johan+linaro@kernel.orgSigned-off-by:
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Johan Hovold authored
The driver function prefix has gotten unnecessarily long and hurts readability. Shorten "qcom_qmp_phy_" to "qmp_" (which likely stands for "Qualcomm Multi PHY" or similar anyway). Signed-off-by:
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Johan Hovold authored
The driver function prefix has gotten unnecessarily long and hurts readability. Shorten "qcom_qmp_phy_" to "qmp_" (which likely stands for "Qualcomm Multi PHY" or similar anyway). Signed-off-by:
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Johan Hovold authored
Drop the secondary register initialisation tables which aren't used by this driver. Signed-off-by:
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Johan Hovold authored
The driver function prefix has gotten unnecessarily long and hurts readability. Shorten "qcom_qmp_phy_" to "qmp_" (which likely stands for "Qualcomm Multi PHY" or similar anyway). Signed-off-by:
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Johan Hovold authored
Drivers should in general not log anything during unless there are errors. Drop the pointless registration info message from the QMP drivers. Signed-off-by:
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Johan Hovold authored
Drop defines and enums that are unused since the QMP driver split. Signed-off-by:
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Johan Hovold authored
Make sure to disable runtime PM also on driver unbind. Fixes: ac0d2399 ("phy: qcom-qmp: Add support for runtime PM"). Signed-off-by:
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Johan Hovold authored
Drop defines and enums that are unused since the QMP driver split. Signed-off-by:
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Johan Hovold authored
Drop the unused and incomplete runtime PM implementation, which was only used by USB PHYs before splitting the QMP driver. Note that the runtime PM was never disabled (and state restored) on driver unbind. This effectively reverts commit ac0d2399 ("phy: qcom-qmp: Add support for runtime PM"). Signed-off-by:
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Johan Hovold authored
Drop defines and enums that are unused since the QMP driver split. Signed-off-by:
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Johan Hovold authored
Drop the unused and incomplete runtime PM implementation, which was only used by USB PHYs before splitting the QMP driver. Note that the runtime PM was never disabled (and state restored) on driver unbind. This effectively reverts commit ac0d2399 ("phy: qcom-qmp: Add support for runtime PM"). Signed-off-by:
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Johan Hovold authored
Drop defines and enums that are unused since the QMP driver split. Signed-off-by:
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Johan Hovold authored
Drop the unused and incomplete runtime PM implementation, which was only used by USB PHYs before splitting the QMP driver. Note that the runtime PM was never disabled (and state restored) on driver unbind. This effectively reverts commit ac0d2399 ("phy: qcom-qmp: Add support for runtime PM"). Signed-off-by:
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Johan Hovold authored
Drop defines and enums that are unused since the QMP driver split. Signed-off-by:
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Johan Hovold authored
Make sure to disable runtime PM also on driver unbind. Fixes: ac0d2399 ("phy: qcom-qmp: Add support for runtime PM"). Signed-off-by:
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- 13 Sep, 2022 9 commits
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Siddharth Vadapalli authored
Each of the CPSW5G ports in J7200 support additional modes like QSGMII. Add a new compatible for J7200 to support the additional modes. In TI's J7200, each of the CPSW5G ethernet interfaces can act as a QSGMII or QSGMII-SUB port. The QSGMII interface is responsible for performing auto-negotiation between the MAC and the PHY while the rest of the interfaces are designated as QSGMII-SUB interfaces, indicating that they will not be taking part in the auto-negotiation process. To indicate the interface which will serve as the main QSGMII interface, add a property "ti,qsgmii-main-ports", whose value indicates the port number of the interface which shall serve as the main QSGMII interface. The rest of the interfaces are then assigned QSGMII-SUB mode by default. The property "ti,qsgmii-main-ports" is used to configure the CTRLMMR_ENETx_CTRL register. Depending on the device, it is possible for more than one QSGMII main port to exist. Thus, the property "ti,qsgmii-main-ports" is defined as an array of values in order to reuse the property for other devices. Signed-off-by:
Siddharth Vadapalli <s-vadapalli@ti.com> Link: https://lore.kernel.org/r/20220912085650.83263-4-s-vadapalli@ti.comSigned-off-by:
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Siddharth Vadapalli authored
TI's J7200 SoC supports additional PHY modes like QSGMII and SGMII that are not supported on earlier SoCs. Add a compatible for it. Signed-off-by:
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Siddharth Vadapalli authored
Change node name in example from "phy-gmii-sel" to "phy", following the device-tree convention of using generic node names. Signed-off-by:
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Johan Jonker authored
Add rockchip,rk3128-usb2phy compatible string. Signed-off-by:
Johan Jonker <jbx6244@gmail.com> Acked-by:
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Colin Foster authored
Convert the phy-ocelot-serdes device tree binding to the new YAML format. Additionally, add the file to MAINTAINERS since the original file didn't exist. Signed-off-by:
Colin Foster <colin.foster@in-advantage.com> Reviewed-by:
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Wei Yongjun authored
In case of error, the function nvmem_cell_read() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). Fixes: 99d9ccd9 ("phy: usb: Add USB2.0 phy driver for Sunplus SP7021") Signed-off-by:
Wei Yongjun <weiyongjun1@huawei.com> Link: https://lore.kernel.org/r/20220909094709.1790970-1-weiyongjun@huaweicloud.comSigned-off-by:
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Krishna Kurapati authored
Add support for overriding electrical signal tuning parameters for SNPS HS Phy. Signed-off-by:
Krishna Kurapati <quic_kriskura@quicinc.com> Reviewed-by:
Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1662480933-12326-3-git-send-email-quic_kriskura@quicinc.comSigned-off-by:
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Sandeep Maheswaram authored
Add device tree bindings for SNPS phy tuning parameters. Signed-off-by:
Sandeep Maheswaram <quic_c_sanm@quicinc.com> Signed-off-by:
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Johan Hovold authored
Drop the obsolete and misleading dual-lane comments which gave the impression that only combo PHYs have a second lane. Signed-off-by:
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