- 13 Aug, 2024 40 commits
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Victor Skvortsov authored
VFs do not perform HW fini/suspend in FLR, so the dpm_enabled is incorrectly kept enabled. Add interface to disable it in virt_pre_reset call. v2: Made implementation generic for all asics v3: Re-order conditionals so PP_MP1_STATE_FLR is only evaluated on VF Signed-off-by:
Victor Skvortsov <victor.skvortsov@amd.com> Reviewed-by:
Lijo Lazar <lijo.lazar@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Victor Skvortsov authored
KIQ timeouts no longer seen. This reverts commit 3a19a8af. Signed-off-by:
Zhigang Luo <zhigang.luo@amd.com> Signed-off-by:
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Yinjie Yao authored
kmd_fw_shared changed in VCN5 Signed-off-by:
Yinjie Yao <yinjie.yao@amd.com> Reviewed-by:
Ruijing Dong <ruijing.dong@amd.com> Acked-by:
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Lijo Lazar authored
If there are multiple nodes per kfd device, add nodeid to location_id to differentiate. Signed-off-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Kenneth Feng authored
add HDP_SD support on gc 12.0.0/1 Signed-off-by:
Kenneth Feng <kenneth.feng@amd.com> Reviewed-by:
Yang Wang <kevinyang.wang@amd.com> Signed-off-by:
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Victor Zhao authored
on MI300/MI308 UBB products, when doing mode1 reset, since 1 gpu need to wait all 8 gpus finish mode1 reset and then do re-init. As observed, sometimes the gpu which triggered the reset need to wait 15s for all gpus to finish. If poll msg timeout, guest driver will send the reset message again, and may mess up the following reinit sequence on other gpus. So extend the time to cover the maximum time needed to recover. Signed-off-by:
Victor Zhao <Victor.Zhao@amd.com> Acked-by:
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Martin Leung authored
This version brings along following fixes: - Fix some cursor issue - Fix print format specifiers in DC_LOG_IPS - Fix minor coding errors in dml21 phase 5 - Fix MST BW calculation Regression - Improve FAM control for DCN401 - Add null pointer checks for some code - Refactor 3DLUT for non-DMA - Optimize vstartup position for AS-SDP - Update to using new dccg callbacks - Enable otg synchronization logic for DCN321 - Disable DCN401 UCLK P-State support on full updates Acked-by:
Wayne Lin <wayne.lin@amd.com> Signed-off-by:
Martin Leung <Martin.Leung@amd.com> Signed-off-by:
Tom Chung <chiahsuan.chung@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
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Rodrigo Siqueira authored
[why & how] Remove unnecessary call to REG_SEQ_SUBMIT and REG_SEQ_WAIT_DONE, since those macros are not necessary anymore at the dpp1 set degamma. Those are part of an old implementation. Acked-by:
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by:
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Rodrigo Siqueira authored
[why & how] When the commit 9d84c7ef ("drm/amd/display: Correct cursor position on horizontal mirror") was introduced, it used the wrong calculation for the position copy for X. This commit uses the correct calculation for that based on the original patch. Fixes: 9d84c7ef ("drm/amd/display: Correct cursor position on horizontal mirror") Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Acked-by:
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Melissa Wen authored
[why & how] Cursor gets clipped off in the middle of the screen with hw rotation 180. Fix a miscalculation of cursor offset when it's placed near the edges in the pipe split case. Cursor bugs with hw rotation were reported on AMD issue tracker: https://gitlab.freedesktop.org/drm/amd/-/issues/2247 The issues on rotation 270 was fixed by: https://lore.kernel.org/amd-gfx/20221118125935.4013669-22-Brian.Chang@amd.com/ that partially addressed the rotation 180 too. So, this patch is the final bits for rotation 180. Reported-by:
Xaver Hugl <xaver.hugl@gmail.com> Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/2247Reviewed-by:
Harry Wentland <harry.wentland@amd.com> Fixes: 9d84c7ef ("drm/amd/display: Correct cursor position on horizontal mirror") Signed-off-by:
Melissa Wen <mwen@igalia.com> Signed-off-by:
Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by:
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Rodrigo Siqueira authored
[why & how] When the commit 5324e2b2 ("drm/amd/display: Add driver support for future FAMS versions") was introduced, it missed some of the FAM2 code. This commit introduces the code that control the FAM enable and disable. Fixes: 5324e2b2 ("drm/amd/display: Add driver support for future FAMS versions") Acked-by:
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Rodrigo Siqueira authored
[why & how] Remove force_backlight_start_level since it is never used. Acked-by:
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Fangzhi Zuo authored
[Why & How] Revert commit 8b2cb32c ("drm/amd/display: FEC overhead should be checked once for mst slot nums") Because causes bw calculation regression Cc: mario.limonciello@amd.com Cc: alexander.deucher@amd.com Reported-by: jirislaby@kernel.org Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3495 Closes: https://bugzilla.suse.com/show_bug.cgi?id=1228093Reviewed-by:
Fangzhi Zuo <Jerry.Zuo@amd.com> Signed-off-by:
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Loan Chen authored
[Why] Tiled display cannot synchronize properly after S3. The fix for commit 5f0c7491 ("drm/amd/display: Fix for otg synchronization logic") is not enable in DCN321, which causes the otg is excluded from synchronization. [How] Enable otg synchronization logic in dcn321. Fixes: 5f0c7491 ("drm/amd/display: Fix for otg synchronization logic") Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by:
Alvin Lee <alvin.lee2@amd.com> Signed-off-by:
Loan Chen <lo-an.chen@amd.com> Signed-off-by:
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Charlene Liu authored
[why & how] this is to remove redundant msg to pmfw at boot/resume since bios already power up dcn. Reviewed-by:
Chris Park <chris.park@amd.com> Signed-off-by:
Charlene Liu <Charlene.Liu@amd.com> Signed-off-by:
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Dillon Varone authored
[WHY&HOW] Set max VTotal cap for dcn401 because VTotal register is only 16 bits wide on dcn401. Reviewed-by:
Dillon Varone <dillon.varone@amd.com> Signed-off-by:
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Dillon Varone authored
[WHY] In certain scenarios DC can internally trigger back to back full updates which will miss some required programming that is normally deferred until post update via optimize_bandwidth. [HOW] In back to back update scenarios, wait for pending updates to complete and perform any strictly required outstanding programming. Reviewed-by:
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Dillon Varone authored
[WHY&HOW] It is not guaranteed even for HW exclusive P-State methods (like VActive) that P-state will be supported properly until optimize bandwidth is called, so unconditionally disable it on full updates. Reviewed-by:
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Dillon Varone authored
[WHY] Stream ID's associated with phantom pipes can change often as they are reconstructed on full updates, however they can remain identical depending on the required update. [HOW] In the case phantom streams and pipe topologies remain the same between updates, mark the transition as seamless. Reviewed-by:
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Srinivasan Shanmugam authored
This commit adds a null check for the 'afb' variable in the amdgpu_dm_plane_handle_cursor_update function. Previously, 'afb' was assumed to be null, but was used later in the code without a null check. This could potentially lead to a null pointer dereference. Changes since v1: - Moved the null check for 'afb' to the line where 'afb' is used. (Alex) Fixes the below: drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_plane.c:1298 amdgpu_dm_plane_handle_cursor_update() error: we previously assumed 'afb' could be null (see line 1252) Cc: Tom Chung <chiahsuan.chung@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Roman Li <roman.li@amd.com> Cc: Alex Hung <alex.hung@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Co-developed-by:
Alex Hung <alex.hung@amd.com> Signed-off-by:
Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by:
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Robin Chen authored
[Why] In current design, the vstartup position is adjusted to vblank start position when AS-SDP is enabled. However when the vblank length is too big, it may over vstartup boundary. [How] To adjust vstartup position to 1 line before vsync position. Reviewed-by:
Anthony Koo <anthony.koo@amd.com> Signed-off-by:
Robin Chen <robin.chen@amd.com> Signed-off-by:
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Roman Li authored
[Why] %d specifier is used for printing unsigned values. It can result in negative values in logs for unsigned variables. [How] Replace %d with %u for unsigned. Reviewed-by:
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by:
Roman Li <Roman.Li@amd.com> Signed-off-by:
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Philip Yang authored
Add helper function kfd_queue_unreference_buffers to reduce queue buffer refcount, separate it from release queue buffers. Because it is circular locking to hold dqm_lock to take vm lock, kfd_ioctl_destroy_queue should take vm lock, unreference queue buffers first, but not release queue buffers, to handle error in case failed to hold vm lock. Then hold dqm_lock to remove queue from queue list and then release queue buffers. Restore process worker restore queue hold dqm_lock, will always find the queue with valid queue buffers. v2 (Felix): - renamed kfd_queue_unreference_buffer(s) to kfd_queue_unref_bo_va(s) - added two FIXME comments for follow up Signed-off-by:
Philip Yang <Philip.Yang@amd.com> Signed-off-by:
Felix Kuehling <felix.kuehling@amd.com> Reviewed-by:
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Jonathan Kim authored
When users dynamically set the partition mode through sysfs writes, this can lead to a double lock situation where the KFD is trying to take the partition lock when updating the recommended SDMA engines. Have the KFD reference its saved socket device number count instead. Also ensure we have enough SDMA xGMI engines to report the recommended engines in the first place. Fixes: e06b71b2 ("drm/amdkfd: allow users to target recommended SDMA engines") Signed-off-by:
Jonathan Kim <jonathan.kim@amd.com> Reviewed-by:
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Sunil Khatri authored
Change condition, if (ptr == NULL) to if (!ptr) for a better format and fix the warning. Reviewed-by:
Sunil Khatri <sunil.khatri@amd.com> Signed-off-by:
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Sunil Khatri authored
Change condition, if (ptr == NULL) to if (!ptr) for a better format and fix the warning. Reviewed-by:
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Sunil Khatri authored
Change condition, if (ptr == NULL) to if (!ptr) for a better format and fix the warning. Reviewed-by:
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Sunil Khatri authored
Change if (ptr == NULL) to if (!ptr) for a better format and fix the warning. Reviewed-by:
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Wayne Lin authored
[why & how] Make sure plane_state is not null before calling a function that dereferences it. Besides, remove redundant codes. Reviewed-by:
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Rodrigo Siqueira authored
[why & how] Change the order of the pipe_ctx->plane_state check to ensure that plane_state is not null before accessing it. Reviewed-by:
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Muhammad Ahmed authored
[why & how] HW removed this w/a, but we will still keep it to avoid regression. but return in test mode. Reviewed-by:
Muhammad Ahmed <ahmed.ahmed@amd.com> Signed-off-by:
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Aurabindo Pillai authored
[why & how] print additional info for MALL related calculations and DMCUB messaging to aid debugging. Reviewed-by:
Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by:
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Hansen Dsouza authored
[Why and how] Update to using new dccg callbacks Reviewed-by:
Hansen Dsouza <Hansen.Dsouza@amd.com> Signed-off-by:
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Austin Zheng authored
[Why] DML21 does not allocate DET evenly between pipes. May result in underflow when unlocking the pipes as DET could be overallocated. [How] 1. Unlock pipes that have a decreased amount of DET allocation 2. Wait for the double buffer to be updated. 3. Unlock the remaining pipes. Reviewed-by:
Austin Zheng <Austin.Zheng@amd.com> Signed-off-by:
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Alex Hung authored
[WHY & HOW] dc->clk_mgr is null checked previously in the same function, indicating it might be null. Passing "dc" to "dc->hwss.apply_idle_power_optimizations", which dereferences null "dc->clk_mgr". (The function pointer resolves to "dcn35_apply_idle_power_optimizations".) This fixes 1 FORWARD_NULL issue reported by Coverity. Reviewed-by:
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Relja Vojvodic authored
[Why] Currently the handling for 3DLUT is found in multiple different places, which causes issues when the different functions are not in sync with each other. Frequently bugs occur because the LUT handling is broken up, and what has already been handled isn't kept track of well, which can cause earlier changes to the LUT params to be overridden. [How] Remove DMA LUT handling from DCN401 and refactor legacy LUT handling in one place to make it easier to keep track of what has and needs to be done. Reviewed-by:
Ilya Bakoulin <ilya.bakoulin@amd.com> Signed-off-by:
Relja Vojvodic <Relja.Vojvodic@amd.com> Signed-off-by:
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Wenjing Liu authored
[why] Based on power measurement result, in most cases when display clock is higher than Vmin display clock, lowering display clock using dynamic ODM will improve overall power consumption by 0 to 4 watts even if we can't reach Vmin. [how] Allow vmin optimization applied even if dispclk can't reach Vmin. Reviewed-by:
Wenjing Liu <wenjing.liu@amd.com> Signed-off-by:
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Wenjing Liu authored
[why & how] There is a coding error which causes incorrect variables to be assigned in DML21 phase 5. Reviewed-by:
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Srinivasan Shanmugam authored
This commit adds a null check for the 'afb' variable in the amdgpu_dm_update_cursor function. Previously, 'afb' was assumed to be null at line 8388, but was used later in the code without a null check. This could potentially lead to a null pointer dereference. Changes since v1: - Moved the null check for 'afb' to the line where 'afb' is used. (Alex) Fixes the below: drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:8433 amdgpu_dm_update_cursor() error: we previously assumed 'afb' could be null (see line 8388) Cc: Tom Chung <chiahsuan.chung@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Roman Li <roman.li@amd.com> Cc: Alex Hung <alex.hung@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Co-developed-by:
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Sunil Khatri authored
This reverts commit f3392e66. Reviewed-by:
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