- 05 Apr, 2023 36 commits
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Bartosz Golaszewski authored
Sort all children of the soc node by the first address in their reg property. This was mostly already the case but there were some nodes that didn't follow it so fix it now for consistency. Signed-off-by:
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by:
Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230327125316.210812-3-brgl@bgdev.pl
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Bartosz Golaszewski authored
The file has inconsistent padding of the address part of soc node children's reg properties. Fix it. Signed-off-by:
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Krzysztof Kozlowski authored
The bindings expect second Soundwire interrupt to be "wakeup" (Linux driver takes by index): sc8280xp-crd.dtb: soundwire-controller@3330000: interrupt-names:1: 'wakeup' was expected Fixes: c18773d1 ("arm64: dts: qcom: sc8280xp: add SoundWire and LPASS") Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by:
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Konrad Dybcio authored
Enable both GPI DMAs. Signed-off-by:
Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by:
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Konrad Dybcio authored
Enable the A630 GPU and its GMU. Signed-off-by:
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Konrad Dybcio authored
Enable ADSP, CDSP and Venus. Signed-off-by:
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Konrad Dybcio authored
Add the properties to ensure the ever so delicate touchscreen setup matches downstream. Signed-off-by:
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Konrad Dybcio authored
Add required pins and RMI4 node to the common DT and remove it from Akatsuki, as it uses a different touch. Since the panels are super high tech proprietary incell, they need to be handled with very precise timings. As such the panel driver sets up the power rails and GPIOs and the touchscreen driver *has to* probe afterwards. Signed-off-by:
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Konrad Dybcio authored
Add required nodes to support display on XZ2/XZ2c. XZ3 has a different power rail setup and needs to be handled separately. Signed-off-by:
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Adam Skladowski authored
Follow other dtses and pad regs to 8 digits. Signed-off-by:
Adam Skladowski <a39.skl@gmail.com> Reviewed-by:
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Adam Skladowski authored
Property phy_mode according to binding checker does not exist, drop it. Signed-off-by:
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Adam Skladowski authored
Provide clocks from dsi_phy to gcc, this will make sure we don't fallback to global name lookup. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
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Adam Skladowski authored
Assign RPM_SMD_XO_CLK_SRC from rpmcc in place of fixed-clock where possible. Signed-off-by:
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Neil Armstrong authored
Fixes the following DT bindings check error: domain-idle-states: cluster-sleep-0: 'idle-state-name', 'local-timer-stop' do not match any of the regexes: 'pinctrl-[0-9]+' domain-idle-states: cluster-sleep-1: 'idle-state-name', 'local-timer-stop' do not match any of the regexes: 'pinctrl-[0-9]+' Reviewed-by:
Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by:
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Krzysztof Kozlowski authored
Domain idle states do not use 'idle-state-name': sc8280xp-crd.dtb: domain-idle-states: cluster-sleep-0: 'idle-state-name' does not match any of the regexes: 'pinctrl-[0-9]+' Reported-by:
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Krzysztof Kozlowski authored
Domain idle states do not use 'idle-state-name' and 'local-timer-stop': sm8350-mtp.dtb: domain-idle-states: cluster-sleep-0: 'idle-state-name', 'local-timer-stop' do not match any of the regexes: 'pinctrl-[0-9]+' Reported-by:
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Krzysztof Kozlowski authored
Domain idle states do not use 'idle-state-name' and 'local-timer-stop': sm8150-hdk.dtb: domain-idle-states: cluster-sleep-0: 'idle-state-name', 'local-timer-stop' do not match any of the regexes: 'pinctrl-[0-9]+' Reported-by:
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Krzysztof Kozlowski authored
Domain idle states do not use 'idle-state-name' and 'local-timer-stop': sm6375-sony-xperia-murray-pdx225.dtb: domain-idle-states: cluster-sleep-0: 'idle-state-name', 'local-timer-stop' do not match any of the regexes: 'pinctrl-[0-9]+' Reported-by:
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Krzysztof Kozlowski authored
Domain idle states do not use 'idle-state-name' and 'local-timer-stop': sdm845-shift-axolotl.dtb: domain-idle-states: cluster-sleep-0: 'idle-state-name', 'local-timer-stop' do not match any of the regexes: 'pinctrl-[0-9]+' Reported-by:
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Krzysztof Kozlowski authored
Domain idle states do not use 'idle-state-name' and 'local-timer-stop': sm8250-hdk.dtb: domain-idle-states: cluster-sleep-0: 'idle-state-name', 'local-timer-stop' do not match any of the regexes: 'pinctrl-[0-9]+' Reported-by:
Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by:
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Konrad Dybcio authored
Add the required nodes to enable the volume down key on the Sony Xperia 10 IV. Signed-off-by:
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Konrad Dybcio authored
Introduce the C3 power state, which - to the best of my understanding - gates the CPU clock, but does not shut off the power rail. Signed-off-by:
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Konrad Dybcio authored
In preparation for supporting a less-deep sleep state, rename the existing rail power off from _0 to _1. Signed-off-by:
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Konrad Dybcio authored
Add a thermal zones configuration for all 15+11 TSENS sensors. Signed-off-by:
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Konrad Dybcio authored
Add nodes for the two TSENS v2.8.0 controllers present on the SoC. Signed-off-by:
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Konrad Dybcio authored
Configure the L3 cache DVFS scaler within the CPUCP block to allow for dynamic frequency switching. Reviewed-by:
Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by:
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Konrad Dybcio authored
Add required nodes to make the embedded 5G modem boot up on SM6375. Signed-off-by:
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Konrad Dybcio authored
Add a node for ATH10K_SNoC wifi on SM6375. Signed-off-by:
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Konrad Dybcio authored
Add a node for the IMEM block on SM6375. Signed-off-by:
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Konrad Dybcio authored
Add a node for RPM sleep stats to enable sleep monitoring. Signed-off-by:
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Konrad Dybcio authored
Use the correct fallback compatible for the BWMONv4 with merged global and monitor register spaces. Reviewed-by:
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Konrad Dybcio authored
Drop the incorrect msm8998 fallback and use the new qcom,sdm845-cpu-bwmon compatible to distinguish the CPU BWMON found on this platform. Reviewed-by:
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Konrad Dybcio authored
Use the correct fallback compatible for the BWMONv4 with merged global and monitor register spaces. Reviewed-by:
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Konrad Dybcio authored
Use the correct fallback compatible for the BWMONv4 with merged global and monitor register spaces. Reviewed-by:
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Konrad Dybcio authored
Add GPUCC and Adreno SMMU nodes in preparation for adding the GPU itself. Signed-off-by:
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Bjorn Andersson authored
Introduce SM6115 GPUCC devicetree bindings, to make it possible to use clock defines in the devicetree source.
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- 04 Apr, 2023 4 commits
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Konrad Dybcio authored
With the gpio-line-names in place coming from SONY themselves, we can now make the pin nodes and their labels to more closely resemble the actual thing. 4k has been renamed to four_k due to dtc limitations. Signed-off-by:
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Konrad Dybcio authored
Sony ever so graciously provides GPIO line names in their downstream kernel (though sometimes they are not 100% accurate and you can judge that by simply looking at them and with what drivers they are used). Add these to the Yoshino devices DTs to better document the hardware. Lilac and Poplar have identical pin assignments. Diff between these two and maple: TLMM: - "NC", + "TS_VDDIO_EN", PMI8998: - "NC" + "USB_SWITCH_SEL" - "NC" + "4K_DISP_DCDC_EN" PM8005: - "NC" + "EAR_EN" Which is probably due to Maple being designed and released quite a bit earlier than the other two and it having a super high tech true-4K display. Signed-off-by:
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Joel Selvaraj authored
The Poco F1 has a single color white notification LED. Enable the Qualcomm Light Pulse Generator (LPG) driver based notification LED. Signed-off-by:
Joel Selvaraj <joelselvaraj.oss@gmail.com> Reviewed-by:
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Komal Bajaj authored
Add a DT node for Last level cache (aka. system cache) controller which provides control over the last level cache present on QDU1000 and QRU1000 SoCs. Signed-off-by:
Komal Bajaj <quic_kbajaj@quicinc.com> Signed-off-by:
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