Commits · fce8a4ac46b0726bc25098855214a67b22b624d0 · Kirill Smelkov / linux

24 Nov, 2020 5 commits

drm/amdgpu: Add gfx doorbell setting for Vangogh · fce8a4ac

Jinzhou Su authored Nov 18, 2020

Using KIQ to map GFX queues instead of MMIO for gfx async ring,
add missing doorbell range setting.

v2: fix typo
Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

fce8a4ac

drm/amd/amdgpu: skip unload message in reset · c95ec47c

Kenneth Feng authored Nov 20, 2020

This has been confirmed that unload message is not needed from SIENNA_CICHLID in reset.
Otherwise it will cause the fw wrong state after reset and no response for any messages.
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

c95ec47c

drm/amd/amdgpu: fix null pointer in runtime pm · 6fb33209

Kenneth Feng authored Nov 17, 2020

fix the null pointer issue when runtime pm is triggered.
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

6fb33209

drm/amd/display: Add DPCS regs for dcn302 link encoder · 78deaf5f

Bhawanpreet Lakha authored Nov 18, 2020

dpcs reg are missing for dcn302 link encoder regs list, so add them.
Just like dcn3
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

78deaf5f

drm/amdgpu: fix SI UVD firmware validate resume fail · bb797811

Sonny Jiang authored Nov 06, 2020

The SI UVD firmware validate key is stored at the end of firmware,
which is changed during resume while playing video. So get the key
at sw_init and store it for fw validate using.
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

bb797811

18 Nov, 2020 7 commits

drm/amdgpu: add DID for dimgrey_cavefish · e7de4aee

Tao Zhou authored Oct 02, 2020

Add device id for dimgrey_cavefish.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

e7de4aee

drm/amdgpu: add device ID for navy_flounder (v2) · 2c1eaddd

Tao Zhou authored Jun 08, 2020

add device ID for navy_flounder

v2: squash in updates
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2c1eaddd

drm/amd/display: Add comments to hdcp property change code · 31c0ed90

Bhawanpreet Lakha authored Sep 26, 2019

[Why]
These comments are helpful in understanding which case each if
statement handles.

[How]
Add comments for state transitions (9 possible cases)
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Zhan Liu <zhan.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

31c0ed90

drm/amd/display: Add display only once. · 97f6c917

Bhawanpreet Lakha authored Sep 26, 2019

[Why]
We call add display multiple times because DESIRED->ENABLED cannot
happen instantaneously. We can't compare the new_state/old_state to
avoid this because on unplug we set the state to DESIRED and on hotplug
the state will still be DESIRED.

[How]
Add a flag to dm_connector_state to keep track of when to enable or
disable HDCP
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Zhan Liu <zhan.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

97f6c917

drm/amd/pm: support runtime PPTable update for dimgrey_cavefish · c28f91dc

Tao Zhou authored Nov 17, 2020

There is no need to reset DPM for PPTable uploading on
dimgrey_cavefish and PMFW can handle it, same as navy_flounder.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

c28f91dc

drm/amd/pm: fix smu_v11_0_init_power power_context allocation · eb45604e

Ryan Taylor authored Nov 10, 2020

Allocate smu_power->power_context to size of smu_11_0_power_context instead of
smu_11_0_dpm_context.
Signed-off-by: Ryan Taylor <Ryan.Taylor@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

eb45604e

drm/amd/display: Always get CRTC updated constant values inside commit tail · 8976f73b

Rodrigo Siqueira authored Nov 17, 2020

We recently improved our display atomic commit and tail sequence to
avoid some issues related to concurrency. One of the major changes
consisted of moving the interrupt disable and the stream release from
our atomic commit to our atomic tail (commit 6d90a208
("drm/amd/display: Move disable interrupt into commit tail")) .
However, the new code introduced inside our commit tail function was
inserted right after the function
drm_atomic_helper_update_legacy_modeset_state(), which has routines for
updating internal data structs related to timestamps. As a result, in
certain conditions, the display module can reach a situation where we
update our constants and, after that, clean it. This situation generates
the following warning:

 amdgpu 0000:03:00.0: drm_WARN_ON_ONCE(drm_drv_uses_atomic_modeset(dev))
 WARNING: CPU: 6 PID: 1269 at drivers/gpu/drm/drm_vblank.c:722
 drm_crtc_vblank_helper_get_vblank_timestamp_internal+0x32b/0x340 [drm]
 ...
 RIP:
 0010:drm_crtc_vblank_helper_get_vblank_timestamp_internal+0x32b/0x340
 [drm]
 ...
 Call Trace:
  ? dc_stream_get_vblank_counter+0x57/0x60 [amdgpu]
  drm_crtc_vblank_helper_get_vblank_timestamp+0x1c/0x20 [drm]
  drm_get_last_vbltimestamp+0xad/0xc0 [drm]
  drm_reset_vblank_timestamp+0x63/0xd0 [drm]
  drm_crtc_vblank_on+0x85/0x150 [drm]
  amdgpu_dm_atomic_commit_tail+0xaf1/0x2330 [amdgpu]
  commit_tail+0x99/0x130 [drm_kms_helper]
  drm_atomic_helper_commit+0x123/0x150 [drm_kms_helper]
  amdgpu_dm_atomic_commit+0x11/0x20 [amdgpu]
  drm_atomic_commit+0x4a/0x50 [drm]
  drm_atomic_helper_set_config+0x7c/0xc0 [drm_kms_helper]
  drm_mode_setcrtc+0x20b/0x7e0 [drm]
  ? tomoyo_path_number_perm+0x6f/0x200
  ? drm_mode_getcrtc+0x190/0x190 [drm]
  drm_ioctl_kernel+0xae/0xf0 [drm]
  drm_ioctl+0x245/0x400 [drm]
  ? drm_mode_getcrtc+0x190/0x190 [drm]
  amdgpu_drm_ioctl+0x4e/0x80 [amdgpu]
  __x64_sys_ioctl+0x91/0xc0
  do_syscall_64+0x38/0x90
  entry_SYSCALL_64_after_hwframe+0x44/0xa9
 ...

For fixing this issue we rely upon a refactor introduced on
drm_atomic_helper_update_legacy_modeset_state ("Remove the timestamping
constant update from drm_atomic_helper_update_legacy_modeset_state()")
which decouples constant values update from
drm_atomic_helper_update_legacy_modeset_state to a new helper.
Basically, this commit uses this new helper and place it right after our
release module to avoid a situation where our CRTC struct gets wrong
values.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1373Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

8976f73b

17 Nov, 2020 3 commits

drm/amd/pm: fix spelling mistakes in dev_warn messages · 17863170

Colin Ian King authored Nov 17, 2020

There are two spelling mistakes in dev_warn messages. Fix these.
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

17863170

drm/amdgpu: make gfxhub_v1_0 callback functions to be static · 0d4d9512

Hawking Zhang authored Nov 16, 2020

Those functions should be invoked through gfxhub.funcs
pointer.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

0d4d9512

drm/amd/pm: retire dimgrey_cavefish hardcode for the use of soft PPTable · 3939c49c

Tao Zhou authored Nov 16, 2020

The PPTable provided by VBIOS can be used.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

3939c49c

16 Nov, 2020 25 commits