Legacy here means pdc4030, ali14xx, umc8672, dtc2278, ht6560b and qd65xx.
They cannot be probed and initialized at a boot parameters' parsing time,
because probing code depends on not yet ready kernel subsystems.

This change also fixes boot parameters' ordering issue, fe. you could
pass "ide0=dtc2278 ide0=noautotune" and "noautotune" was catched too late.

"biostimings" cannot be hardcoded to -19, make it -8.
Code in ide_setup() assumes that everything <= -11 is a legacy
chipset name, so fe. "ide0=ali14xx ide0=biostimings" will fail
while "ide0=biostimings ide0=ali14xx" will be okay.

This further optimizes the 'kick wakeup' scheduler feature:

 - do not kick any CPU on UP

 - no need to mark the target task for reschedule - it's enough to send an
   interrupt to that CPU, that will initiate a signal processing pass.

Well, this is it for me and strlcpy. I'll leave the rest of the
non-obvious usages of strncpy to the kernel janitors. Seems like quite a
few uses really wanted memcpy instead, but I don't have time to
investigate them all. It does appear that nearly all strncpy's will be
removable. Obsoleting strncpy will probably atleast make the remaining
few think about how they are using it.

This is the patch for my trip through drivers/*.

Remove crt0_rom.S from m68knommu DragonEngine2 target config.

It is no longer required.

Start code for m68knommu DragonEngine2 target is now all in crt0_ram.S.

This patch moves all the code into this one file.

Remove crt0_himem.S from m68knommu DragenEngine2 config.

It is no longer required.

Numerous fixes for the m68knommu DragonEngine2 setup code.

It was out of date relative to more recent kernels.  Original patches
from Georges Menie.

Remove crt0_fixed.S from m68knommu DragonEngine2 setup.
No longer required.

into home.transmeta.com:/home/torvalds/v2.5/linux

into home.transmeta.com:/home/torvalds/v2.5/linux

Contributed by Intel, with updates by
Jay Vosburgh @ IBM (bonding maintainer)

the same patch stil applies..

Not sure if I incorporated all your feedback on this one last time.
Bug me if not...

Maintainer fix that went into 2.4 last August with the comments
"Get hamachi net driver RX working again.
 Apparently the PCI DMA conversion still has a bug or two left in it..."

Remember these? There never was an outcome as to whether or
not their doing the right thing.  Any complaints from this being
in 2.4 for nearly a year ?

Leftovers from before we used memset to clear the struct.

Noticed (indirectly) by davej

For reasons only Motorola will ever know they decided to use a
substantially different register layout for the FEC ethernet device on
the 5282 ColdFire silicon.  This defines an appropriate access structure
for it.

The ColdFire 5282 CPU also uses the Motorla FEC ethernet core, allow if
to be selected for that config.

This adds support for the ColdFire 5282 to the ColdFire serial driver.

Only a few small changes, notably the interrupt setup is a little
different.  Also removed some dead code.

Add support for the 5282 ColdFire to the common ColdFire serial
driver header. Also added the additional registers of the 5272,
they are used to setup a more accurate baud rate timers

Rework the m68knommu/ColdFire/5307 Makefile to build the correct
timer code for each of the different ColdFire CPU types.

d_path() can return -ENAMETOOLONG these days. Pass it upstream.

A patch mostly by Will Cohen, adding a parameter to OProfile to
over-ride use of the perfctr hardware. Useful for testing and
a host of other things.

The code that attempts to reset last_task and in_kernel has a race
against samples appearing during the handling of the buffers, that
causes a small number of mis-attribution of samples. Closing the
window is non-obvious, and not worth it, so we just make it smaller.
Even without the patch, there seem to be few such "bad" samples
because its effects are mitigated on a switch into userspace or
a task switch.

My previous fix was incomplete, we could get the same thing happening
on the init-failure path. Fix that.

This code supports the PIT timer of the 5282 ColdFire.

This new timer device is completely different to the previous ColdFire
timer device.

Create a header file to support the PIT timer of the ColdFire 5282 CPU.
This timer is completely different to all previous ColdFire timers.

Add DMA base addresses for the ColdFire 5282 CPU.

Modify the common SIM header for all ColdFire CPU's to incldue the
new 5282 ColdFire defines.

Create header definitions file to support the ColdFire 5282 CPU.
Unfortunately its register layout and setup is quite different
to previous ColdFire CPU family members.

Start up code for the M5282C3 Motorola ColdFire 5282 evaluation board.

New architecture and board for the m68knommu architecture branch, though
it is not very different to most existing ColdFire eval boards.