/* * Copyright 2013 Eukréa Electromatique <denis@eukrea.com> * Copyright 2014 Freescale Semiconductor, Inc. * * The code contained herein is licensed under the GNU General Public * License. You may obtain a copy of the GNU General Public License * Version 2 or later at the following locations: * * http://www.opensource.org/licenses/gpl-license.html * http://www.gnu.org/copyleft/gpl.html */ /dts-v1/; #include "imx35.dtsi" / { model = "Freescale i.MX35 Product Development Kit"; compatible = "fsl,imx35-pdk", "fsl,imx35"; memory { reg = <0x80000000 0x8000000>, <0x90000000 0x8000000>; }; }; &esdhc1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_esdhc1>; status = "okay"; }; &iomuxc { imx35-pdk { pinctrl_esdhc1: esdhc1grp { fsl,pins = < MX35_PAD_SD1_CMD__ESDHC1_CMD 0x80000000 MX35_PAD_SD1_CLK__ESDHC1_CLK 0x80000000 MX35_PAD_SD1_DATA0__ESDHC1_DAT0 0x80000000 MX35_PAD_SD1_DATA1__ESDHC1_DAT1 0x80000000 MX35_PAD_SD1_DATA2__ESDHC1_DAT2 0x80000000 MX35_PAD_SD1_DATA3__ESDHC1_DAT3 0x80000000 >; }; pinctrl_uart1: uart1grp { fsl,pins = < MX35_PAD_TXD1__UART1_TXD_MUX 0x1c5 MX35_PAD_RXD1__UART1_RXD_MUX 0x1c5 MX35_PAD_CTS1__UART1_CTS 0x1c5 MX35_PAD_RTS1__UART1_RTS 0x1c5 >; }; }; }; &nfc { nand-bus-width = <16>; nand-ecc-mode = "hw"; nand-on-flash-bbt; status = "okay"; }; &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; fsl,uart-has-rtscts; status = "okay"; };