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Kirill Smelkov
slapos
Commits
1909a9e6
Commit
1909a9e6
authored
Sep 19, 2023
by
Kirill Smelkov
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X x['attr'] -> x.attr for ru and cell
parent
2f084dc9
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3
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3 changed files
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57 additions
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57 deletions
+57
-57
software/ors-amarisoft/config/enb.cfg
software/ors-amarisoft/config/enb.cfg
+2
-2
software/ors-amarisoft/config/enb.jinja2.cfg
software/ors-amarisoft/config/enb.jinja2.cfg
+51
-51
software/ors-amarisoft/config/lte.jinja2
software/ors-amarisoft/config/lte.jinja2
+4
-4
No files found.
software/ors-amarisoft/config/enb.cfg
View file @
1909a9e6
...
...
@@ -40,7 +40,7 @@
gnb_id_bits: 28,
en_dc_support: true,
// LTE cells
XXX ru['xxx'] -> ru.xxx
// LTE cells
cell_list: [
// CELL1_a
...
...
@@ -1281,4 +1281,4 @@
ho_from_meas: true,
},
// NR cells
XXX restore
// NR cells
XXX restore
software/ors-amarisoft/config/enb.jinja2.cfg
View file @
1909a9e6
...
...
@@ -4,7 +4,7 @@
{#- defaults provide default values for parameters.
it should be kept in sync with "default" in json schemas #}
{#- XXX ssb_pos_bitmap=10000000 is for TDD only; FDD -> "1000"
#}
{#- XXX ssb_pos_bitmap=10000000 is for TDD only; FDD -> "1000"
#}
{%- set defaults = {
'enb_id': '0x1A2D0',
'gnb_id': '0x12345',
...
...
@@ -80,11 +80,11 @@
{%- else %}
{%- do seen.append(cell_ref) %}
{%- set ru = icell['_']['ru'] %}
{%- if ru
['ru_type'] == 'ru_ref'
%}
{{- ru
['ru_ref'] | tojson
}}
{%- elif ru
['ru_type'] == 'ruincell_ref'
%}
{%- if ru
.ru_type == 'ru_ref'
%}
{{- ru
.ru_ref | tojson
}}
{%- elif ru
.ru_type == 'ruincell_ref'
%}
{#- XXX first check referred cell exist ? #}
{{- _jcell_ru_ref(icell_dict[ru
['ruincell_ref']], seen)
}}
{{- _jcell_ru_ref(icell_dict[ru
.ruincell_ref], seen)
}}
{%- else %}
{#- ru definition is embedded into cell #}
{{- ('_%s_ru' % J(jref_of_shared(icell))) | tojson }}
...
...
@@ -123,17 +123,17 @@
{%- do iru_dict.update({ref: iru}) %}
{%- elif 'cell_type' in _ %}
{%- set icell = slave %}
{%- for k, v in defaults['cell/' + _
['cell_type']].items()
%}
{%- for k, v in defaults['cell/' + _
.cell_type].items()
%}
{%- do _.setdefault(k, v) %}
{%- endfor %}
{%- do icell_dict.update({ref: icell}) %}
{%- set ru = _['ru'] %}
{%- if ru
['ru_type'] not in ('ru_ref', 'ruincell_ref')
%}
{%- if ru
.ru_type not in ('ru_ref', 'ruincell_ref')
%}
{#- embedded ru definition -> expose it as `_<cell_ref>_ru` #}
{%- do iru_dict.update({'_%s_ru' % ref: {
'_': ru,
'slave_title': '%s. RU' % icell
['slave_title']
,
'slave_reference': icell
['slave_reference']
,
'slave_title': '%s. RU' % icell
.slave_title
,
'slave_reference': icell
.slave_reference
,
}}) %}
{%- endif %}
{%- else %}
...
...
@@ -191,20 +191,20 @@
{%- for rf_port, (ru_ref, iru) in enumerate(iru_dict|dictsort) %}
{%- set ru = iru['_'] %}
{%- do ru.update({'_rf_port': rf_port}) %}
{%- if ru
['ru_type'] == 'sdr'
%}
{%- if ru
.ru_type == 'sdr'
%}
{%- do ru_sdr_dict.update({len(dev_argv): ru}) %}
{#- XXX move to ru/sdr ? #}
{%- for n in ru
['sdr_dev_list']
%}
{%- for n in ru
.sdr_dev_list
%}
{%- do dev_argv.append("dev%d=/dev/sdr%d" % (len(dev_argv), n)) %}
{%- endfor %}
{%- elif ru
['ru_link_type'] == 'cpri'
%}
{%- elif ru
.ru_link_type == 'cpri'
%}
{%- do ru_cpri_dict.update({len(dev_argv): ru}) %}
{%- set link = ru
['cpri_link']
%}
{%- set link = ru
.cpri_link
%}
{#- set cpri_link parameters to default #}
{%- for k, v in defaults['cpri_link'].items() %}
{%- do link.setdefault(k, v) %}
{%- endfor %}
{%- do dev_argv.append("dev%d=/dev/sdr%d@%d" % (len(dev_argv), link
['sdr_dev'], link['sfp_port']
)) %}
{%- do dev_argv.append("dev%d=/dev/sdr%d@%d" % (len(dev_argv), link
.sdr_dev, link.sfp_port
)) %}
{%- else %}
{%- do bug('unreachable') %}
{%- endif %}
...
...
@@ -223,7 +223,7 @@
{%- if len(ru_cpri_dict) > 0 %}
{%- set vcpri = [None]*len(dev_argv) %}
{%- for dev, ru in ru_cpri_dict|dictsort %}
{%- do vcpri.__setitem__(dev, ru
['cpri_link']
) %}
{%- do vcpri.__setitem__(dev, ru
.cpri_link
) %}
{%- endfor %}
cpri_mapping: "{{ vcpri | map(attribute='mapping') | map('default', '') | join(',') }}",
cpri_mult: "{{ vcpri | map(attribute='mult') | map('default', '') | join(',') }}",
...
...
@@ -305,25 +305,25 @@
gnb_id_bits: {{ cfg('gnb_id_bits') }},
en_dc_support: true,
// LTE cells
XXX ru['xxx'] -> ru.xxx
// LTE cells
cell_list: [
{%- for i, (cell_ref, icell) in enumerate(icell_dict|dictsort) %}
{%- set cell = icell['_'] %}
{%- if cell
['cell_type'] == 'lte'
%}
{%- if cell
.cell_type == 'lte'
%}
{%- set ru_ref = J(jcell_ru_ref(icell)) %}
{%- set iru = iru_dict[ru_ref] %}
{%- set ru = iru['_'] %}
// {{ J(jref_of_shared(icell)) }}
{
rf_port: {{ ru
['_rf_port']
}},
n_antenna_dl: {{ ru
['n_antenna_dl']
}},
n_antenna_ul: {{ ru
['n_antenna_ul']
}},
cell_id: {{ cell
['cell_id']
}},
tac: {{ cell
['tac']
}},
n_id_cell: {{ cell
['pci']
}},
dl_earfcn: {{ cell
['dl_earfcn']
}},
rf_port: {{ ru
._rf_port
}},
n_antenna_dl: {{ ru
.n_antenna_dl
}},
n_antenna_ul: {{ ru
.n_antenna_ul
}},
cell_id: {{ cell
.cell_id
}},
tac: {{ cell
.tac
}},
n_id_cell: {{ cell
.pci
}},
dl_earfcn: {{ cell
.dl_earfcn
}},
root_sequence_index: {{ cell.get('root_sequence_index',
slapparameter_dict.get('root_sequence_index',
204 + i)) }},
...
...
@@ -335,16 +335,16 @@
{%- set cell2 = icell2['_'] %}
{%- if cell2_ref != cell_ref %} {#- NOTE: HO to both LTE and NR #}
{
{%- if cell2
['cell_type']
== 'lte' %}
{%- if cell2
.cell_type
== 'lte' %}
rat: "eutra",
cell_id: {{ cfg('enb_id')}}{{ cell2
['cell_id']
}}, // -> {{ J(jref_of_shared(icell2)) }}
n_id_cell: {{ cell2
['pci']
}},
dl_earfcn: {{ cell2
['dl_earfcn']
}},
tac: {{ cell2
['tac']
}},
{%- elif cell2
['cell_type']
== 'nr' %}
cell_id: {{ cfg('enb_id')}}{{ cell2
.cell_id
}}, // -> {{ J(jref_of_shared(icell2)) }}
n_id_cell: {{ cell2
.pci
}},
dl_earfcn: {{ cell2
.dl_earfcn
}},
tac: {{ cell2
.tac
}},
{%- elif cell2
.cell_type
== 'nr' %}
rat: "nr",
nr_cell_id: {{ cfg('gnb_id')}}{{ cell2
['cell_id']
}}, // -> {{ J(jref_of_shared(icell2)) }}
n_id_cell: {{ cell2
['pci']
}},
nr_cell_id: {{ cfg('gnb_id')}}{{ cell2
.cell_id
}}, // -> {{ J(jref_of_shared(icell2)) }}
n_id_cell: {{ cell2
.pci
}},
gnb_id_bits
dl_nr_arfcn
ssb_nr_arfcn
...
...
@@ -374,9 +374,9 @@
scell_list: [
{%- for cell2_ref, icell2 in icell_dict|dictsort %}
{%- set cell2 = icell2['_'] %}
{%- if cell2_ref != cell_ref and cell2
['cell_type']
== 'lte' %}
{%- if cell2_ref != cell_ref and cell2
.cell_type
== 'lte' %}
{
cell_id: {{ cell2
['cell_id']
}}, // + {{ J(jref_of_shared(icell2)) }}
cell_id: {{ cell2
.cell_id
}}, // + {{ J(jref_of_shared(icell2)) }}
cross_carrier_scheduling: false,
},
{%- endif %}
...
...
@@ -385,7 +385,7 @@
// tune LTE parameters for the cell
{%- set tdd = (cell
['rf_mode']
== 'tdd') %}
{%- set tdd = (cell
.rf_mode
== 'tdd') %}
{%- if tdd %}
uldl_config: {{ lte.cell_tdd_config(cell) }},
sp_config: 7,
...
...
@@ -396,7 +396,7 @@
si_coderate: {{ 0.30 if n_rb_dl == 6 else 0.20 }},
pdsch_dedicated: {
p_a: {{ {4: -6, 2: -3}.get(ru
['n_antenna_dl']
, 0) }},
p_a: {{ {4: -6, 2: -3}.get(ru
.n_antenna_dl
, 0) }},
p_b: -1,
},
...
...
@@ -414,7 +414,7 @@
{%- endif %}
},
{%- if ru
['n_antenna_dl']
>= 2 %}
{%- if ru
.n_antenna_dl
>= 2 %}
m_ri: 8,
transmission_mode: 3,
{%- endif %}
...
...
@@ -445,7 +445,7 @@
},
{#- XXX do we want to differentiate whether it is ORS or Amarisoft SDR board ? #}
{%- if ru
['ru_type']
== 'sdr' %}
{%- if ru
.ru_type
== 'sdr' %}
manual_ref_signal_power: true,
{%- endif %}
...
...
@@ -565,30 +565,30 @@
ho_from_meas: true,
},
// NR cells
XXX restore
// NR cells
XXX restore
{#
nr_cell_list: [
{%- for i, (cell_ref, icell) in enumerate(icell_dict|dictsort) %}
{%- set cell = icell['_'] %}
{%- if cell
['cell_type'] == 'nr'
%}
{%- if cell
.cell_type == 'nr'
%}
{%- set ru_ref = J(jcell_ru_ref(icell)) %}
{%- set iru = iru_dict[ru_ref] %}
{%- set ru = iru['_'] %}
// {{ J(jref_of_shared(icell)) }}
{
rf_port: {{ ru
['_rf_port']
}},
n_antenna_dl: {{ ru
['n_antenna_dl']
}},
n_antenna_ul: {{ ru
['n_antenna_ul']
}},
rf_port: {{ ru
._rf_port
}},
n_antenna_dl: {{ ru
.n_antenna_dl
}},
n_antenna_ul: {{ ru
.n_antenna_ul
}},
cell_id: {{ cell
['cell_id']
}},
n_id_cell: {{ cell
['pci']
}},
band: {{ cell
['nr_band']
}},
dl_nr_arfcn: {{ cell
['dl_nr_arfcn']
}},
bandwidth: {{ cell
['bandwidth']
}},
cell_id: {{ cell
.cell_id
}},
n_id_cell: {{ cell
.pci
}},
band: {{ cell
.nr_band
}},
dl_nr_arfcn: {{ cell
.dl_nr_arfcn
}},
bandwidth: {{ cell
.bandwidth
}},
subcarrier_spacing: 30, // XXX FDD -> 15
ssb_pos_bitmap: {{ cell
['ssb_pos_bitmap']
}},
ssb_pos_bitmap: {{ cell
.ssb_pos_bitmap
}},
root_sequence_index: 1, // XXX adjust from cfg('root_sequence_index') XXX place
...
...
@@ -607,7 +607,7 @@
{%- endif -%}
{%- endif %}
{%- set tdd = (cell
['rf_mode']
== 'tdd') %}
{%- set tdd = (cell
.rf_mode
== 'tdd') %}
{%- set tdd_config = lte.nr_cell_tdd_config(cell) if tdd else None %},
{% if tdd_config == 1 %}
...
...
software/ors-amarisoft/config/lte.jinja2
View file @
1909a9e6
...
...
@@ -4,7 +4,7 @@
{%- macro cell_tdd_config(cell) %}
{%- set _ = {'[Configuration 2] 5ms 2UL 6DL (default)': 2,
'[Configuration 6] 5ms 5UL 3DL (maximum uplink)': 6} %}
{{- _[cell
['tdd_ul_dl_config']
] }}
{{- _[cell
.tdd_ul_dl_config
] }}
{%- endmacro -%}
{#- XXX doc, naming ok ? #}
...
...
@@ -12,7 +12,7 @@
{%- set _ = {'5ms 2UL 7DL 4/6 (default)': 1,
'2.5ms 1UL 3DL 2/10': 2,
'5ms 8UL 3DL 2/10 (maximum uplink)': 3} %}
{{- _[cell
['tdd_ul_dl_config']
] }}
{{- _[cell
.tdd_ul_dl_config
] }}
{%- endmacro -%}
{#- cell_n_rb_dl returns n_rb_dl for an LTE cell. #}
...
...
@@ -23,14 +23,14 @@
'10 MHz': 50,
'15 MHz': 75,
'20 MHz': 100} %}
{{- _[cell
['bandwidth']
] }}
{{- _[cell
.bandwidth
] }}
{%- endmacro -%}
{#- cell_drb_config returns drb_config section for an LTE cell.
DRB configuration varies in beteen FDD and TDD modes. #}
{%- macro cell_drb_config(cell) %}
{%- if cell
['rf_mode']
== 'tdd' %}
{%- if cell
.rf_mode
== 'tdd' %}
{%- set T_REORDERING = 65 %}
{%- else %}
{%- set T_REORDERING = 35 %}
...
...
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