Commit f34b7f89 authored by Lu Xu's avatar Lu Xu 👀 Committed by Joanne Hugé

Add gnb.N78-3699-maxload.cfg

parent e8d8da65
/* gNodeB test mode for PDSCH or PUSCH */
{
// log_options: "all.level=debug,all.max_size=0",
log_options: "all.level=error,all.max_size=0,nas.level=debug,nas.max_size=1,s1ap.level=debug,rrc.level=debug,rrc.max_size=1",
log_filename: "/tmp/enb0.log",
#define TDD 1
#define FR2 0
/* test PUSCH (1) or of PDSCH (0) */
#define TM_PUSCH 0
rf_driver: {
name: "sdr",
/* list of devices. 'dev0' is always the master. */
args: "dev0=/dev/sdr0",
/* synchronisation source: none, internal, gps, external (default = none) */
// sync: "gps",
/* TDD: force the RX antenna on the RX connector */
rx_antenna:"tx_rx",
},
tx_gain: 70.0, /* TX gain (in dB) */
rx_gain: 50.0, /* RX gain (in dB) */
#if FR2
rf_ports: [
{
/* an external frequency translator must be used */
rf_dl_freq: 3649.980,
rf_ul_freq: 3649.980,
}
],
#endif
/* address of MME for S1AP connection. Must be modified if the MME
runs on a different host. */
mme_list: [ ],
/* GTP bind address (=address of the ethernet interface connected to
the MME). Must be modified if the MME runs on a different host. */
gtp_addr: "127.0.1.1",
/* PLMN */
mcc: "001",
mnc: "01",
/* list of cells */
cell_list: [
], /* cell_list */
/* NR cells */
nr_cell_list: [
{
rf_port: 0,
cell_id: 0x02,
#if TDD
#if FR2
band: 257,
dl_nr_arfcn: 2079167, /* 28000.08 MHz */
ssb_nr_arfcn: 2079167,
subcarrier_spacing: 120, /* kHz */
bandwidth: 50, /* MHz */
#else
band: 78,
dl_nr_arfcn: 646666, /* 3700.00 MHz */
//dl_nr_arfcn: 636666, /* 3550 MHz */
//dl_nr_arfcn: 636734, /* 3551.010 MHz */
//dl_nr_arfcn: 633332, /* 3499.98 MHz */
//ssb_nr_arfcn: 646666,
subcarrier_spacing: 30, /* kHz */
bandwidth: 40, /* MHz */
#endif
#else
band: 2,
dl_nr_arfcn: 396000, /* 1980 MHz */
ssb_nr_arfcn: 396000,
ssb_subcarrier_spacing: 15, /* kHz */
subcarrier_spacing: 30, /* kHz */
bandwidth: 20, /* MHz */
#endif
n_antenna_dl: 2, /* 1-8 */
n_antenna_ul: 2, /* 1-8 */
n_id_cell: 500,
#if TDD
#if FR2
tdd_ul_dl_config: {
pattern1: {
period: 0.625, /* in ms */
dl_slots: 3,
dl_symbols: 10,
ul_slots: 1,
ul_symbols: 2,
},
},
ssb_pos_bitmap: "0100000000000000000000000000000000000000000000000000000000000000",
#else
tdd_ul_dl_config: {
pattern1: {
period: 5, /* in ms */
dl_slots: 7,
dl_symbols: 6,
ul_slots: 2,
ul_symbols: 0,
},
},
ssb_pos_bitmap: "10000000",
#endif
#else
ssb_pos_bitmap: "1000",
#endif
ssb_period: 10, /* in ms */
p_max: 10, /* dBm */
root_sequence_index: 1, /* PRACH root sequence index */
dmrs_type_a_pos: 2,
sr_period: 0,
prach: {
#if TDD
#if FR2
prach_config_index: 149, /* format B4, subframe 9 */
msg1_subcarrier_spacing: 120, /* kHz */
#else
prach_config_index: 160, /* format B4, subframe 9 */
msg1_subcarrier_spacing: 30, /* kHz */
#endif
#else
prach_config_index: 16, /* subframe 1 every frame */
#endif
msg1_fdm: 1,
msg1_frequency_start: 0,
zero_correlation_zone_config: 15,
preamble_received_target_power: -110,
preamble_trans_max: 7,
power_ramping_step: 4,
ra_response_window: 20,
restricted_set_config: "unrestricted_set",
ra_contention_resolution_timer: 64, /* in ms */
ssb_per_prach_occasion: 1,
#if FR2
cb_preambles_per_ssb: 4,
#else
cb_preambles_per_ssb: 8,
#endif
},
pdcch: {
rb_start: -1,
l_crb: -1, /* -1 means all the bandwidth */
duration: 1,
css: {
n_candidates: [ 0, 4, 2, 1, 0 ],
},
rar_al_index: 2,
uss: {
n_candidates: [ 0, 2, 1, 0, 0 ],
dci_0_1_and_1_1: true,
},
al_index: 1,
},
pdsch: {
mapping_type: "typeA",
start_symb: 1,
n_symb: 13,
dmrs_add_pos: 1,
dmrs_type: 1,
dmrs_max_len: 1,
mcs_table: "qam256",
k0: 0, /* delay in slots from DCI to PDSCH */
#if TDD
#if FR2
k1: [ 14, 13, 12, 11],
#else
k1: [ 8, 7, 7, 6, 5, 4, 12, 11 ],
#endif
#else
k1: 4,
#endif
/* hardcoded scheduling parameters */
mcs: 28,
rar_mcs: 2,
fer: 0,
fixed_rb_alloc: true,
rb_start: 0,
#if FR2
l_crb: 32,
#else
l_crb: 51,
#endif
},
pucch: {
pucch_group_hopping: "neither",
hopping_id: -1, /* -1 = n_cell_id */
p0_nominal: -90,
pucch1: {
n_cs: 3,
n_occ: 3,
},
pucch4: {
occ_len: 4,
bpsk: false,
additional_dmrs: false,
freq_hopping: true,
max_code_rate: 0.25,
},
},
pusch: {
mapping_type: "typeA",
beta_offset_ack_index: 9,
n_symb: 14,
dmrs_add_pos: 1,
dmrs_type: 1,
dmrs_max_len: 1,
tf_precoding: false,
mcs_table: "qam256", /* without transform precoding */
mcs_table_tp: "qam256", /* with transform precoding */
ldpc_max_its: 5,
#if FR2
k2: 11, /* delay in slots from DCI to PUSCH */
msg3_k2: 14,
#else
k2: 4, /* delay in slots from DCI to PUSCH */
msg3_k2: 6,
#endif
msg3_mcs: 5,
msg3_delta_power: 0, /* in dB */
p0_nominal_with_grant: -76,
/* hardcoded scheduling parameters */
mcs: 27,
},
/* MAC configuration */
mac_config: {
msg3_max_harq_tx: 5,
ul_max_harq_tx: 1, /* max number of HARQ transmissions for uplink */
dl_max_harq_tx: 5, /* max number of HARQ transmissions for downlink */
ul_max_consecutive_retx: 30, /* disconnect UE if reached */
dl_max_consecutive_retx: 30, /* disconnect UE if reached */
periodic_bsr_timer: 20,
retx_bsr_timer: 320,
periodic_phr_timer: 500,
prohibit_phr_timer: 200,
phr_tx_power_factor_change: "dB3"
},
test_mode: {
#if TM_PUSCH
type: "pusch",
rnti: 0x100,
#else
type: "pdsch",
rnti: 0x100,
random_data: false, /* if true, send random data instead of zeros */
#if FR2
pdsch_harq_ack_disable: true, /* needed to use all DL slots */
#endif
#endif
},
cipher_algo_pref: [],
integ_algo_pref: [2, 1],
drb_config: "drb_nr.cfg",
},
], /* nr_cell_list */
tdd_legacy_timing: false,
}
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