• Vladimir Oltean's avatar
    net: dsa: sja1105: Configure the Time-Aware Scheduler via tc-taprio offload · 317ab5b8
    Vladimir Oltean authored
    This qdisc offload is the closest thing to what the SJA1105 supports in
    hardware for time-based egress shaping. The switch core really is built
    around SAE AS6802/TTEthernet (a TTTech standard) but can be made to
    operate similarly to IEEE 802.1Qbv with some constraints:
    
    - The gate control list is a global list for all ports. There are 8
      execution threads that iterate through this global list in parallel.
      I don't know why 8, there are only 4 front-panel ports.
    
    - Care must be taken by the user to make sure that two execution threads
      never get to execute a GCL entry simultaneously. I created a O(n^4)
      checker for this hardware limitation, prior to accepting a taprio
      offload configuration as valid.
    
    - The spec says that if a GCL entry's interval is shorter than the frame
      length, you shouldn't send it (and end up in head-of-line blocking).
      Well, this switch does anyway.
    
    - The switch has no concept of ADMIN and OPER configurations. Because
      it's so simple, the TAS settings are loaded through the static config
      tables interface, so there isn't even place for any discussion about
      'graceful switchover between ADMIN and OPER'. You just reset the
      switch and upload a new OPER config.
    
    - The switch accepts multiple time sources for the gate events. Right
      now I am using the standalone clock source as opposed to PTP. So the
      base time parameter doesn't really do much. Support for the PTP clock
      source will be added in a future series.
    Signed-off-by: default avatarVladimir Oltean <olteanv@gmail.com>
    Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
    317ab5b8
Makefile 393 Bytes