• Mauro Rossi's avatar
    drm/amd/display: dc/clk_mgr: add support for SI parts (v2) · 3ecb3b79
    Mauro Rossi authored
    (v1) Changelog
    
    [Why]
    After commit c69dd2d0 "drm/amd/display: Refactor clk_mgr functions"
    dc/clk_mgr requires these changes to add SI parts support
    Necessary to avoid hitting default: ASSERT(0); /* Unknown Asic */
    that would cause kernel freeze
    
    [How]
    Add case statement for FAMILY_SI chipsets
    
    (v2) Changelog
    
    [Why]
    DCE6 has no DPREFCLK_CNTL register
    
    [How]
    Add DCE6 specific macros definitions for CLK registers and masks
    Add DCE6 specific dce60/dce60_clk_mgr.c for DCE6 customization
    Code style: reuse all the public functions in dce100/dce_clk_mgr.h header
    Code style: use dce60_* static functions as per other DCE implementations
    Add dce60_get_dp_ref_freq_khz() w/o using DPREFCLK_CNTL register
    Use dce60_get_dp_ref_freq_khz() function in dce60_funcs
    Add DCE6 specific dce60_clk_mgr_construct
    dc/clk_mgr/dce_clk_mgr.c: use dce60_clk_mgr_construct for FAMILY_SI chipsets
    Add Makefile rules for dce60_clk_mgr.o target conditional to CONFIG_DRM_AMD_DC_SI
    Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
    Signed-off-by: default avatarMauro Rossi <issor.oruam@gmail.com>
    Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
    3ecb3b79
Makefile 4.75 KB