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Lv Zheng authored
ACPICA commit cbb0294649cbd7e8bd6107e4329461a6a7a0d967 This patch adds power of two rounding support up to 32 bits. The result of the shift operations rearching to the boundary of the cpu word is unpredicatable, so 64-bit roundings are not supported in order to make sure no rounded shift-overs. This support may not be performance friendly, so the APIs might be overridden by the hosts implementations with ACPI_USE_NATIVE_BIT_FINDER defined. Link: https://github.com/acpica/acpica/commit/cbb02946Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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