• Jan Beulich's avatar
    x86/asm/64: Use 32-bit XOR to zero registers · a7bea830
    Jan Beulich authored
    Some Intel CPUs don't recognize 64-bit XORs as zeroing idioms. Zeroing
    idioms don't require execution bandwidth, as they're being taken care
    of in the frontend (through register renaming). Use 32-bit XORs instead.
    Signed-off-by: default avatarJan Beulich <jbeulich@suse.com>
    Cc: Alok Kataria <akataria@vmware.com>
    Cc: Andy Lutomirski <luto@kernel.org>
    Cc: Borislav Petkov <bp@alien8.de>
    Cc: Brian Gerst <brgerst@gmail.com>
    Cc: Denys Vlasenko <dvlasenk@redhat.com>
    Cc: H. Peter Anvin <hpa@zytor.com>
    Cc: Josh Poimboeuf <jpoimboe@redhat.com>
    Cc: Juergen Gross <jgross@suse.com>
    Cc: Linus Torvalds <torvalds@linux-foundation.org>
    Cc: Peter Zijlstra <peterz@infradead.org>
    Cc: Thomas Gleixner <tglx@linutronix.de>
    Cc: davem@davemloft.net
    Cc: herbert@gondor.apana.org.au
    Cc: pavel@ucw.cz
    Cc: rjw@rjwysocki.net
    Link: http://lkml.kernel.org/r/5B39FF1A02000078001CFB54@prv1-mh.provo.novell.comSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
    a7bea830
sha1_ssse3_asm.S 11.3 KB