Commit 0cfecb7c authored by Radhakrishna Sripada's avatar Radhakrishna Sripada Committed by Rodrigo Vivi

Revert "drm/i915: Display WA #1133 WaFbcSkipSegments:cnl, glk"

This reverts commit 8f067837.

HSD says "WA withdrawn. It was causing corruption with some images.
WA is not strictly necessary since this bug just causes loss of FBC
compression with some sizes and images, but doesn't break anything."

Fixes: 8f067837 ("drm/i915: Display WA #1133 WaFbcSkipSegments:cnl, glk")
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarRadhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171117010825.23118-1-radhakrishna.sripada@intel.com
parent 248c2435
...@@ -2985,9 +2985,6 @@ enum i915_power_well_id { ...@@ -2985,9 +2985,6 @@ enum i915_power_well_id {
#define ILK_DPFC_CHICKEN _MMIO(0x43224) #define ILK_DPFC_CHICKEN _MMIO(0x43224)
#define ILK_DPFC_DISABLE_DUMMY0 (1<<8) #define ILK_DPFC_DISABLE_DUMMY0 (1<<8)
#define ILK_DPFC_NUKE_ON_ANY_MODIFICATION (1<<23) #define ILK_DPFC_NUKE_ON_ANY_MODIFICATION (1<<23)
#define GLK_SKIP_SEG_EN (1<<12)
#define GLK_SKIP_SEG_COUNT_MASK (3<<10)
#define GLK_SKIP_SEG_COUNT(x) ((x)<<10)
#define ILK_FBC_RT_BASE _MMIO(0x2128) #define ILK_FBC_RT_BASE _MMIO(0x2128)
#define ILK_FBC_RT_VALID (1<<0) #define ILK_FBC_RT_VALID (1<<0)
#define SNB_FBC_FRONT_BUFFER (1<<1) #define SNB_FBC_FRONT_BUFFER (1<<1)
......
...@@ -121,7 +121,6 @@ static void bxt_init_clock_gating(struct drm_i915_private *dev_priv) ...@@ -121,7 +121,6 @@ static void bxt_init_clock_gating(struct drm_i915_private *dev_priv)
static void glk_init_clock_gating(struct drm_i915_private *dev_priv) static void glk_init_clock_gating(struct drm_i915_private *dev_priv)
{ {
u32 val;
gen9_init_clock_gating(dev_priv); gen9_init_clock_gating(dev_priv);
/* /*
...@@ -141,11 +140,6 @@ static void glk_init_clock_gating(struct drm_i915_private *dev_priv) ...@@ -141,11 +140,6 @@ static void glk_init_clock_gating(struct drm_i915_private *dev_priv)
I915_WRITE(CHICKEN_MISC_2, val); I915_WRITE(CHICKEN_MISC_2, val);
} }
/* Display WA #1133: WaFbcSkipSegments:glk */
val = I915_READ(ILK_DPFC_CHICKEN);
val &= ~GLK_SKIP_SEG_COUNT_MASK;
val |= GLK_SKIP_SEG_EN | GLK_SKIP_SEG_COUNT(1);
I915_WRITE(ILK_DPFC_CHICKEN, val);
} }
static void i915_pineview_get_mem_freq(struct drm_i915_private *dev_priv) static void i915_pineview_get_mem_freq(struct drm_i915_private *dev_priv)
...@@ -8503,12 +8497,6 @@ static void cnl_init_clock_gating(struct drm_i915_private *dev_priv) ...@@ -8503,12 +8497,6 @@ static void cnl_init_clock_gating(struct drm_i915_private *dev_priv)
if (IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_B0)) if (IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_B0))
val |= SARBUNIT_CLKGATE_DIS; val |= SARBUNIT_CLKGATE_DIS;
I915_WRITE(SLICE_UNIT_LEVEL_CLKGATE, val); I915_WRITE(SLICE_UNIT_LEVEL_CLKGATE, val);
/* Display WA #1133: WaFbcSkipSegments:cnl */
val = I915_READ(ILK_DPFC_CHICKEN);
val &= ~GLK_SKIP_SEG_COUNT_MASK;
val |= GLK_SKIP_SEG_EN | GLK_SKIP_SEG_COUNT(1);
I915_WRITE(ILK_DPFC_CHICKEN, val);
} }
static void cfl_init_clock_gating(struct drm_i915_private *dev_priv) static void cfl_init_clock_gating(struct drm_i915_private *dev_priv)
......
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