Commit 123e4b3b authored by Markos Chandras's avatar Markos Chandras

MIPS: Use the new "ZC" constraint for MIPS R6

GCC versions supporting MIPS R6 use the ZC constraint to enforce a
9-bit offset for MIPS R6. We will use that for all MIPS R6 LL/SC
instructions.

Cc: Matthew Fortune <Matthew.Fortune@imgtec.com>
Signed-off-by: default avatarMarkos Chandras <markos.chandras@imgtec.com>
parent 94bfb75a
...@@ -16,13 +16,18 @@ ...@@ -16,13 +16,18 @@
#define GCC_REG_ACCUM "accum" #define GCC_REG_ACCUM "accum"
#endif #endif
#ifdef CONFIG_CPU_MIPSR6
/* All MIPS R6 toolchains support the ZC constrain */
#define GCC_OFF_SMALL_ASM() "ZC"
#else
#ifndef CONFIG_CPU_MICROMIPS #ifndef CONFIG_CPU_MICROMIPS
#define GCC_OFF_SMALL_ASM() "R" #define GCC_OFF_SMALL_ASM() "R"
#elif __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9) #elif __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9)
#define GCC_OFF_SMALL_ASM() "ZC" #define GCC_OFF_SMALL_ASM() "ZC"
#else #else
#error "microMIPS compilation unsupported with GCC older than 4.9" #error "microMIPS compilation unsupported with GCC older than 4.9"
#endif #endif /* CONFIG_CPU_MICROMIPS */
#endif /* CONFIG_CPU_MIPSR6 */
#ifdef CONFIG_CPU_MIPSR6 #ifdef CONFIG_CPU_MIPSR6
#define MIPS_ISA_LEVEL "mips64r6" #define MIPS_ISA_LEVEL "mips64r6"
......
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