Commit 1246f1dc authored by Ben Skeggs's avatar Ben Skeggs

drm/nouveau/gr/gf100-: virtualise init_gpc_mmu + apply fixes from traces

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 334cc26d
...@@ -1920,7 +1920,7 @@ gf100_gr_init_gpc_mmu(struct gf100_gr *gr) ...@@ -1920,7 +1920,7 @@ gf100_gr_init_gpc_mmu(struct gf100_gr *gr)
struct nvkm_fb *fb = device->fb; struct nvkm_fb *fb = device->fb;
nvkm_wr32(device, 0x418880, nvkm_rd32(device, 0x100c80) & 0x00000001); nvkm_wr32(device, 0x418880, nvkm_rd32(device, 0x100c80) & 0x00000001);
nvkm_wr32(device, 0x4188a4, 0x00000000); nvkm_wr32(device, 0x4188a4, 0x03000000);
nvkm_wr32(device, 0x418888, 0x00000000); nvkm_wr32(device, 0x418888, 0x00000000);
nvkm_wr32(device, 0x41888c, 0x00000000); nvkm_wr32(device, 0x41888c, 0x00000000);
nvkm_wr32(device, 0x418890, 0x00000000); nvkm_wr32(device, 0x418890, 0x00000000);
......
...@@ -308,22 +308,30 @@ gm107_gr_init_bios(struct gf100_gr *gr) ...@@ -308,22 +308,30 @@ gm107_gr_init_bios(struct gf100_gr *gr)
} }
} }
static void
gm107_gr_init_gpc_mmu(struct gf100_gr *gr)
{
struct nvkm_device *device = gr->base.engine.subdev.device;
struct nvkm_fb *fb = device->fb;
nvkm_wr32(device, GPC_BCAST(0x0880), 0x00000000);
nvkm_wr32(device, GPC_BCAST(0x0890), 0x00000000);
nvkm_wr32(device, GPC_BCAST(0x0894), 0x00000000);
nvkm_wr32(device, GPC_BCAST(0x08b4), nvkm_memory_addr(fb->mmu_wr) >> 8);
nvkm_wr32(device, GPC_BCAST(0x08b8), nvkm_memory_addr(fb->mmu_rd) >> 8);
}
static int static int
gm107_gr_init(struct gf100_gr *gr) gm107_gr_init(struct gf100_gr *gr)
{ {
struct nvkm_device *device = gr->base.engine.subdev.device; struct nvkm_device *device = gr->base.engine.subdev.device;
struct nvkm_fb *fb = device->fb;
const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total); const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total);
u32 data[TPC_MAX / 8] = {}; u32 data[TPC_MAX / 8] = {};
u8 tpcnr[GPC_MAX]; u8 tpcnr[GPC_MAX];
int gpc, tpc, rop; int gpc, tpc, rop;
int i; int i;
nvkm_wr32(device, GPC_BCAST(0x0880), 0x00000000); gr->func->init_gpc_mmu(gr);
nvkm_wr32(device, GPC_BCAST(0x0890), 0x00000000);
nvkm_wr32(device, GPC_BCAST(0x0894), 0x00000000);
nvkm_wr32(device, GPC_BCAST(0x08b4), nvkm_memory_addr(fb->mmu_wr) >> 8);
nvkm_wr32(device, GPC_BCAST(0x08b8), nvkm_memory_addr(fb->mmu_rd) >> 8);
gf100_gr_mmio(gr, gr->func->mmio); gf100_gr_mmio(gr, gr->func->mmio);
...@@ -442,6 +450,7 @@ gm107_gr_gpccs_ucode = { ...@@ -442,6 +450,7 @@ gm107_gr_gpccs_ucode = {
static const struct gf100_gr_func static const struct gf100_gr_func
gm107_gr = { gm107_gr = {
.init = gm107_gr_init, .init = gm107_gr_init,
.init_gpc_mmu = gm107_gr_init_gpc_mmu,
.init_rop_active_fbps = gk104_gr_init_rop_active_fbps, .init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
.init_ppc_exceptions = gk104_gr_init_ppc_exceptions, .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
.mmio = gm107_gr_pack_mmio, .mmio = gm107_gr_pack_mmio,
......
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