Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
L
linux
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
Analytics
Analytics
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Commits
Issue Boards
Open sidebar
nexedi
linux
Commits
13243cc5
Commit
13243cc5
authored
Jul 27, 2002
by
Linus Torvalds
Committed by
Russell King
Jul 27, 2002
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
Move cmd640_lock outside the CONFIG_BLK_DEV_CMD640_ENHANCED
test, since it is needed regardless.
parent
0884bb35
Changes
1
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
6 additions
and
6 deletions
+6
-6
drivers/ide/cmd640.c
drivers/ide/cmd640.c
+6
-6
No files found.
drivers/ide/cmd640.c
View file @
13243cc5
...
@@ -164,6 +164,12 @@ int cmd640_vlb = 0;
...
@@ -164,6 +164,12 @@ int cmd640_vlb = 0;
#define DRWTIM23 0x58
#define DRWTIM23 0x58
#define BRST 0x59
#define BRST 0x59
/*
* Protects register file access from overlapping on primary and secondary
* channel, since those share hardware resources.
*/
static
spinlock_t
cmd640_lock
__cacheline_aligned
=
SPIN_LOCK_UNLOCKED
;
/*
/*
* Registers and masks for easy access by drive index:
* Registers and masks for easy access by drive index:
*/
*/
...
@@ -172,12 +178,6 @@ static u8 prefetch_masks[4] = {CNTRL_DIS_RA0, CNTRL_DIS_RA1, ARTTIM23_DIS_RA2, A
...
@@ -172,12 +178,6 @@ static u8 prefetch_masks[4] = {CNTRL_DIS_RA0, CNTRL_DIS_RA1, ARTTIM23_DIS_RA2, A
#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
/*
* Protects register file access from overlapping on primary and secondary
* channel, since those share hardware resources.
*/
static
spinlock_t
cmd640_lock
__cacheline_aligned
=
SPIN_LOCK_UNLOCKED
;
static
u8
arttim_regs
[
4
]
=
{
ARTTIM0
,
ARTTIM1
,
ARTTIM23
,
ARTTIM23
};
static
u8
arttim_regs
[
4
]
=
{
ARTTIM0
,
ARTTIM1
,
ARTTIM23
,
ARTTIM23
};
static
u8
drwtim_regs
[
4
]
=
{
DRWTIM0
,
DRWTIM1
,
DRWTIM23
,
DRWTIM23
};
static
u8
drwtim_regs
[
4
]
=
{
DRWTIM0
,
DRWTIM1
,
DRWTIM23
,
DRWTIM23
};
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment