Commit 13321786 authored by Daniel Vetter's avatar Daniel Vetter

drm/i915: Clarify irq_lock locking, special cases

Grab bag for all the special cases:
- i9xx_check_fifo_underruns is only called from crtc_enable hooks,
  i.e. process context.
- i915_enable_asle_pipestat is only called from interrupt postinstall
  hooks. So again process context.
- gen8_irq_power_well_post_enable is called from the runtime pm code,
  which again means process context.
- The open-coded hpd_irq_setup loop in _thaw is also running in process
  context.

So for all of them the plain _irq variant is sufficient.
Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 222c7f51
...@@ -686,11 +686,10 @@ static int __i915_drm_thaw(struct drm_device *dev, bool restore_gtt_mappings) ...@@ -686,11 +686,10 @@ static int __i915_drm_thaw(struct drm_device *dev, bool restore_gtt_mappings)
intel_modeset_init_hw(dev); intel_modeset_init_hw(dev);
{ {
unsigned long irqflags; spin_lock_irq(&dev_priv->irq_lock);
spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
if (dev_priv->display.hpd_irq_setup) if (dev_priv->display.hpd_irq_setup)
dev_priv->display.hpd_irq_setup(dev); dev_priv->display.hpd_irq_setup(dev);
spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); spin_unlock_irq(&dev_priv->irq_lock);
} }
intel_dp_mst_resume(dev); intel_dp_mst_resume(dev);
......
...@@ -310,9 +310,8 @@ void i9xx_check_fifo_underruns(struct drm_device *dev) ...@@ -310,9 +310,8 @@ void i9xx_check_fifo_underruns(struct drm_device *dev)
{ {
struct drm_i915_private *dev_priv = dev->dev_private; struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_crtc *crtc; struct intel_crtc *crtc;
unsigned long flags;
spin_lock_irqsave(&dev_priv->irq_lock, flags); spin_lock_irq(&dev_priv->irq_lock);
for_each_intel_crtc(dev, crtc) { for_each_intel_crtc(dev, crtc) {
u32 reg = PIPESTAT(crtc->pipe); u32 reg = PIPESTAT(crtc->pipe);
...@@ -331,7 +330,7 @@ void i9xx_check_fifo_underruns(struct drm_device *dev) ...@@ -331,7 +330,7 @@ void i9xx_check_fifo_underruns(struct drm_device *dev)
DRM_ERROR("pipe %c underrun\n", pipe_name(crtc->pipe)); DRM_ERROR("pipe %c underrun\n", pipe_name(crtc->pipe));
} }
spin_unlock_irqrestore(&dev_priv->irq_lock, flags); spin_unlock_irq(&dev_priv->irq_lock);
} }
static void i9xx_set_fifo_underrun_reporting(struct drm_device *dev, static void i9xx_set_fifo_underrun_reporting(struct drm_device *dev,
...@@ -696,19 +695,18 @@ i915_disable_pipestat(struct drm_i915_private *dev_priv, enum pipe pipe, ...@@ -696,19 +695,18 @@ i915_disable_pipestat(struct drm_i915_private *dev_priv, enum pipe pipe,
static void i915_enable_asle_pipestat(struct drm_device *dev) static void i915_enable_asle_pipestat(struct drm_device *dev)
{ {
struct drm_i915_private *dev_priv = dev->dev_private; struct drm_i915_private *dev_priv = dev->dev_private;
unsigned long irqflags;
if (!dev_priv->opregion.asle || !IS_MOBILE(dev)) if (!dev_priv->opregion.asle || !IS_MOBILE(dev))
return; return;
spin_lock_irqsave(&dev_priv->irq_lock, irqflags); spin_lock_irq(&dev_priv->irq_lock);
i915_enable_pipestat(dev_priv, PIPE_B, PIPE_LEGACY_BLC_EVENT_STATUS); i915_enable_pipestat(dev_priv, PIPE_B, PIPE_LEGACY_BLC_EVENT_STATUS);
if (INTEL_INFO(dev)->gen >= 4) if (INTEL_INFO(dev)->gen >= 4)
i915_enable_pipestat(dev_priv, PIPE_A, i915_enable_pipestat(dev_priv, PIPE_A,
PIPE_LEGACY_BLC_EVENT_STATUS); PIPE_LEGACY_BLC_EVENT_STATUS);
spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); spin_unlock_irq(&dev_priv->irq_lock);
} }
/** /**
...@@ -3477,14 +3475,12 @@ static void gen8_irq_reset(struct drm_device *dev) ...@@ -3477,14 +3475,12 @@ static void gen8_irq_reset(struct drm_device *dev)
void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv) void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv)
{ {
unsigned long irqflags; spin_lock_irq(&dev_priv->irq_lock);
spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
GEN8_IRQ_INIT_NDX(DE_PIPE, PIPE_B, dev_priv->de_irq_mask[PIPE_B], GEN8_IRQ_INIT_NDX(DE_PIPE, PIPE_B, dev_priv->de_irq_mask[PIPE_B],
~dev_priv->de_irq_mask[PIPE_B]); ~dev_priv->de_irq_mask[PIPE_B]);
GEN8_IRQ_INIT_NDX(DE_PIPE, PIPE_C, dev_priv->de_irq_mask[PIPE_C], GEN8_IRQ_INIT_NDX(DE_PIPE, PIPE_C, dev_priv->de_irq_mask[PIPE_C],
~dev_priv->de_irq_mask[PIPE_C]); ~dev_priv->de_irq_mask[PIPE_C]);
spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); spin_unlock_irq(&dev_priv->irq_lock);
} }
static void cherryview_irq_preinstall(struct drm_device *dev) static void cherryview_irq_preinstall(struct drm_device *dev)
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment