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Commit 1719e119 authored by Radu Voicilas's avatar Radu Voicilas Committed by Greg Kroah-Hartman
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Staging: rtl8192e: Code style fix for r819xE_phyreg.h 

Changed all the comments to conform to the standard, aligned register values.
Signed-off-by: default avatarRadu Voicilas <rvoicilas@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 8f266841
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Showing with 574 additions and 540 deletions
drivers/staging/rtl8192e/r819xE_phyreg.h
View file @ 1719e119
...@@ -81,55 +81,70 @@ ...@@ -81,55 +81,70 @@
#define rFPGA0_XB_LSSIReadBack 0x8a4 #define rFPGA0_XB_LSSIReadBack 0x8a4
#define rFPGA0_XC_LSSIReadBack 0x8a8 #define rFPGA0_XC_LSSIReadBack 0x8a8
#define rFPGA0_XD_LSSIReadBack 0x8ac #define rFPGA0_XD_LSSIReadBack 0x8ac
#define rFPGA0_PSDReport 0x8b4 #define rFPGA0_PSDReport 0x8b4
#define rFPGA0_XAB_RFInterfaceRB 0x8e0 #define rFPGA0_XAB_RFInterfaceRB 0x8e0
#define rFPGA0_XCD_RFInterfaceRB 0x8e4 #define rFPGA0_XCD_RFInterfaceRB 0x8e4
//page 9 /* Page 9 - RF mode & OFDM TxSC */
#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC #define rFPGA1_RFMOD 0x900
#define rFPGA1_TxBlock 0x904 #define rFPGA1_TxBlock 0x904
#define rFPGA1_DebugSelect 0x908 #define rFPGA1_DebugSelect 0x908
#define rFPGA1_TxInfo 0x90c #define rFPGA1_TxInfo 0x90c
//page a /* Page a */
#define rCCK0_System 0xa00 #define rCCK0_System 0xa00
#define rCCK0_AFESetting 0xa04 #define rCCK0_AFESetting 0xa04
#define rCCK0_CCA 0xa08 #define rCCK0_CCA 0xa08
#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level /* AGC default value, saturation level */
#define rCCK0_RxAGC2 0xa10 //AGC & DAGC #define rCCK0_RxAGC1 0xa0c
#define rCCK0_RxHP 0xa14 /* AGC & DAGC */
#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold #define rCCK0_RxAGC2 0xa10
#define rCCK0_DSPParameter2 0xa1c //SQ threshold #define rCCK0_RxHP 0xa14
#define rCCK0_TxFilter1 0xa20 /* Timing recovery & channel estimation threshold */
#define rCCK0_TxFilter2 0xa24 #define rCCK0_DSPParameter1 0xa18
#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 /* SQ threshold */
#define rCCK0_FalseAlarmReport 0xa2c //0xa2d #define rCCK0_DSPParameter2 0xa1c
#define rCCK0_TRSSIReport 0xa50 #define rCCK0_TxFilter1 0xa20
#define rCCK0_RxReport 0xa54 //0xa57 #define rCCK0_TxFilter2 0xa24
#define rCCK0_FACounterLower 0xa5c //0xa5b /* Debug port and TX filter 3 */
#define rCCK0_FACounterUpper 0xa58 //0xa5c #define rCCK0_DebugPort 0xa28
#define rCCK0_FalseAlarmReport 0xa2c
//page c #define rCCK0_TRSSIReport 0xa50
#define rOFDM0_LSTF 0xc00 #define rCCK0_RxReport 0xa54
#define rCCK0_FACounterLower 0xa5c
#define rCCK0_FACounterUpper 0xa58
/* Page c */
#define rOFDM0_LSTF 0xc00
#define rOFDM0_TRxPathEnable 0xc04 #define rOFDM0_TRxPathEnable 0xc04
#define rOFDM0_TRMuxPar 0xc08 #define rOFDM0_TRMuxPar 0xc08
#define rOFDM0_TRSWIsolation 0xc0c #define rOFDM0_TRSWIsolation 0xc0c
#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter /* RxIQ DC offset, Rx digital filter, DC notch filter */
#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix #define rOFDM0_XARxAFE 0xc10
#define rOFDM0_XBRxAFE 0xc18 /* RxIQ imblance matrix */
#define rOFDM0_XARxIQImbalance 0xc14
#define rOFDM0_XBRxAFE 0xc18
#define rOFDM0_XBRxIQImbalance 0xc1c #define rOFDM0_XBRxIQImbalance 0xc1c
#define rOFDM0_XCRxAFE 0xc20 #define rOFDM0_XCRxAFE 0xc20
#define rOFDM0_XCRxIQImbalance 0xc24 #define rOFDM0_XCRxIQImbalance 0xc24
#define rOFDM0_XDRxAFE 0xc28 #define rOFDM0_XDRxAFE 0xc28
#define rOFDM0_XDRxIQImbalance 0xc2c #define rOFDM0_XDRxIQImbalance 0xc2c
#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD /* PD, BW & SBD */
#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. #define rOFDM0_RxDetector1 0xc30
#define rOFDM0_RxDetector3 0xc38 //Frame Sync. /* SBD */
#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI #define rOFDM0_RxDetector2 0xc34
#define rOFDM0_RxDSP 0xc40 //Rx Sync Path /* Frame Sync */
#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC #define rOFDM0_RxDetector3 0xc38
#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold /* PD, SBD, Frame Sync & Short-GI */
#define rOFDM0_ECCAThreshold 0xc4c // energy CCA #define rOFDM0_RxDetector4 0xc3c
/* Rx Sync Path */
#define rOFDM0_RxDSP 0xc40
/* CFO & DAGC */
#define rOFDM0_CFOandDAGC 0xc44
/* CCA Drop threshold */
#define rOFDM0_CCADropThreshold 0xc48
/* Energy CCA */
#define rOFDM0_ECCAThreshold 0xc4c
#define rOFDM0_XAAGCCore1 0xc50 #define rOFDM0_XAAGCCore1 0xc50
#define rOFDM0_XAAGCCore2 0xc54 #define rOFDM0_XAAGCCore2 0xc54
#define rOFDM0_XBAGCCore1 0xc58 #define rOFDM0_XBAGCCore1 0xc58
...@@ -141,501 +156,517 @@ ...@@ -141,501 +156,517 @@
#define rOFDM0_AGCParameter1 0xc70 #define rOFDM0_AGCParameter1 0xc70
#define rOFDM0_AGCParameter2 0xc74 #define rOFDM0_AGCParameter2 0xc74
#define rOFDM0_AGCRSSITable 0xc78 #define rOFDM0_AGCRSSITable 0xc78
#define rOFDM0_HTSTFAGC 0xc7c #define rOFDM0_HTSTFAGC 0xc7c
#define rOFDM0_XATxIQImbalance 0xc80 #define rOFDM0_XATxIQImbalance 0xc80
#define rOFDM0_XATxAFE 0xc84 #define rOFDM0_XATxAFE 0xc84
#define rOFDM0_XBTxIQImbalance 0xc88 #define rOFDM0_XBTxIQImbalance 0xc88
#define rOFDM0_XBTxAFE 0xc8c #define rOFDM0_XBTxAFE 0xc8c
#define rOFDM0_XCTxIQImbalance 0xc90 #define rOFDM0_XCTxIQImbalance 0xc90
#define rOFDM0_XCTxAFE 0xc94 #define rOFDM0_XCTxAFE 0xc94
#define rOFDM0_XDTxIQImbalance 0xc98 #define rOFDM0_XDTxIQImbalance 0xc98
#define rOFDM0_XDTxAFE 0xc9c #define rOFDM0_XDTxAFE 0xc9c
#define rOFDM0_RxHPParameter 0xce0 #define rOFDM0_RxHPParameter 0xce0
#define rOFDM0_TxPseudoNoiseWgt 0xce4 #define rOFDM0_TxPseudoNoiseWgt 0xce4
#define rOFDM0_FrameSync 0xcf0 #define rOFDM0_FrameSync 0xcf0
#define rOFDM0_DFSReport 0xcf4 #define rOFDM0_DFSReport 0xcf4
#define rOFDM0_TxCoeff1 0xca4 #define rOFDM0_TxCoeff1 0xca4
#define rOFDM0_TxCoeff2 0xca8 #define rOFDM0_TxCoeff2 0xca8
#define rOFDM0_TxCoeff3 0xcac #define rOFDM0_TxCoeff3 0xcac
#define rOFDM0_TxCoeff4 0xcb0 #define rOFDM0_TxCoeff4 0xcb0
#define rOFDM0_TxCoeff5 0xcb4 #define rOFDM0_TxCoeff5 0xcb4
#define rOFDM0_TxCoeff6 0xcb8 #define rOFDM0_TxCoeff6 0xcb8
//page d /* Page d */
#define rOFDM1_LSTF 0xd00 #define rOFDM1_LSTF 0xd00
#define rOFDM1_TRxPathEnable 0xd04 #define rOFDM1_TRxPathEnable 0xd04
#define rOFDM1_CFO 0xd08 #define rOFDM1_CFO 0xd08
#define rOFDM1_CSI1 0xd10 #define rOFDM1_CSI1 0xd10
#define rOFDM1_SBD 0xd14 #define rOFDM1_SBD 0xd14
#define rOFDM1_CSI2 0xd18 #define rOFDM1_CSI2 0xd18
#define rOFDM1_CFOTracking 0xd2c #define rOFDM1_CFOTracking 0xd2c
#define rOFDM1_TRxMesaure1 0xd34 #define rOFDM1_TRxMesaure1 0xd34
#define rOFDM1_IntfDet 0xd3c #define rOFDM1_IntfDet 0xd3c
#define rOFDM1_PseudoNoiseStateAB 0xd50 #define rOFDM1_PseudoNoiseStateAB 0xd50
#define rOFDM1_PseudoNoiseStateCD 0xd54 #define rOFDM1_PseudoNoiseStateCD 0xd54
#define rOFDM1_RxPseudoNoiseWgt 0xd58 #define rOFDM1_RxPseudoNoiseWgt 0xd58
#define rOFDM_PHYCounter1 0xda0 //cca, parity fail /* cca, parity fail */
#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail #define rOFDM_PHYCounter1 0xda0
#define rOFDM_PHYCounter3 0xda8 //MCS not support /* rate illegal, crc8 fail */
#define rOFDM_ShortCFOAB 0xdac #define rOFDM_PHYCounter2 0xda4
#define rOFDM_ShortCFOCD 0xdb0 /* MCS not supported */
#define rOFDM_LongCFOAB 0xdb4 #define rOFDM_PHYCounter3 0xda8
#define rOFDM_LongCFOCD 0xdb8 #define rOFDM_ShortCFOAB 0xdac
#define rOFDM_TailCFOAB 0xdbc #define rOFDM_ShortCFOCD 0xdb0
#define rOFDM_TailCFOCD 0xdc0 #define rOFDM_LongCFOAB 0xdb4
#define rOFDM_LongCFOCD 0xdb8
#define rOFDM_TailCFOAB 0xdbc
#define rOFDM_TailCFOCD 0xdc0
#define rOFDM_PWMeasure1 0xdc4 #define rOFDM_PWMeasure1 0xdc4
#define rOFDM_PWMeasure2 0xdc8 #define rOFDM_PWMeasure2 0xdc8
#define rOFDM_BWReport 0xdcc #define rOFDM_BWReport 0xdcc
#define rOFDM_AGCReport 0xdd0 #define rOFDM_AGCReport 0xdd0
#define rOFDM_RxSNR 0xdd4 #define rOFDM_RxSNR 0xdd4
#define rOFDM_RxEVMCSI 0xdd8 #define rOFDM_RxEVMCSI 0xdd8
#define rOFDM_SIGReport 0xddc #define rOFDM_SIGReport 0xddc
//page e /* Page e */
#define rTxAGC_Rate18_06 0xe00 #define rTxAGC_Rate18_06 0xe00
#define rTxAGC_Rate54_24 0xe04 #define rTxAGC_Rate54_24 0xe04
#define rTxAGC_CCK_Mcs32 0xe08 #define rTxAGC_CCK_Mcs32 0xe08
#define rTxAGC_Mcs03_Mcs00 0xe10 #define rTxAGC_Mcs03_Mcs00 0xe10
#define rTxAGC_Mcs07_Mcs04 0xe14 #define rTxAGC_Mcs07_Mcs04 0xe14
#define rTxAGC_Mcs11_Mcs08 0xe18 #define rTxAGC_Mcs11_Mcs08 0xe18
#define rTxAGC_Mcs15_Mcs12 0xe1c #define rTxAGC_Mcs15_Mcs12 0xe1c
//RF /* RF Zebra 1 */
//Zebra1
#define rZebra1_HSSIEnable 0x0 #define rZebra1_HSSIEnable 0x0
#define rZebra1_TRxEnable1 0x1 #define rZebra1_TRxEnable1 0x1
#define rZebra1_TRxEnable2 0x2 #define rZebra1_TRxEnable2 0x2
#define rZebra1_AGC 0x4 #define rZebra1_AGC 0x4
#define rZebra1_ChargePump 0x5 #define rZebra1_ChargePump 0x5
#define rZebra1_Channel 0x7 #define rZebra1_Channel 0x7
#define rZebra1_TxGain 0x8 #define rZebra1_TxGain 0x8
#define rZebra1_TxLPF 0x9 #define rZebra1_TxLPF 0x9
#define rZebra1_RxLPF 0xb #define rZebra1_RxLPF 0xb
#define rZebra1_RxHPFCorner 0xc #define rZebra1_RxHPFCorner 0xc
//Zebra4 /* Zebra 4 */
#define rGlobalCtrl 0 #define rGlobalCtrl 0
#define rRTL8256_TxLPF 19 #define rRTL8256_TxLPF 19
#define rRTL8256_RxLPF 11 #define rRTL8256_RxLPF 11
//RTL8258 /* RTL8258 */
#define rRTL8258_TxLPF 0x11 #define rRTL8258_TxLPF 0x11
#define rRTL8258_RxLPF 0x13 #define rRTL8258_RxLPF 0x13
#define rRTL8258_RSSILPF 0xa #define rRTL8258_RSSILPF 0xa
//Bit Mask /* Bit Mask */
//page-1 /* Page 1 */
#define bBBResetB 0x100 #define bBBResetB 0x100
#define bGlobalResetB 0x200 #define bGlobalResetB 0x200
#define bOFDMTxStart 0x4 #define bOFDMTxStart 0x4
#define bCCKTxStart 0x8 #define bCCKTxStart 0x8
#define bCRC32Debug 0x100 #define bCRC32Debug 0x100
#define bPMACLoopback 0x10 #define bPMACLoopback 0x10
#define bTxLSIG 0xffffff #define bTxLSIG 0xffffff
#define bOFDMTxRate 0xf #define bOFDMTxRate 0xf
#define bOFDMTxReserved 0x10 #define bOFDMTxReserved 0x10
#define bOFDMTxLength 0x1ffe0 #define bOFDMTxLength 0x1ffe0
#define bOFDMTxParity 0x20000 #define bOFDMTxParity 0x20000
#define bTxHTSIG1 0xffffff #define bTxHTSIG1 0xffffff
#define bTxHTMCSRate 0x7f #define bTxHTMCSRate 0x7f
#define bTxHTBW 0x80 #define bTxHTBW 0x80
#define bTxHTLength 0xffff00 #define bTxHTLength 0xffff00
#define bTxHTSIG2 0xffffff #define bTxHTSIG2 0xffffff
#define bTxHTSmoothing 0x1 #define bTxHTSmoothing 0x1
#define bTxHTSounding 0x2 #define bTxHTSounding 0x2
#define bTxHTReserved 0x4 #define bTxHTReserved 0x4
#define bTxHTAggreation 0x8 #define bTxHTAggreation 0x8
#define bTxHTSTBC 0x30 #define bTxHTSTBC 0x30
#define bTxHTAdvanceCoding 0x40 #define bTxHTAdvanceCoding 0x40
#define bTxHTShortGI 0x80 #define bTxHTShortGI 0x80
#define bTxHTNumberHT_LTF 0x300 #define bTxHTNumberHT_LTF 0x300
#define bTxHTCRC8 0x3fc00 #define bTxHTCRC8 0x3fc00
#define bCounterReset 0x10000 #define bCounterReset 0x10000
#define bNumOfOFDMTx 0xffff #define bNumOfOFDMTx 0xffff
#define bNumOfCCKTx 0xffff0000 #define bNumOfCCKTx 0xffff0000
#define bTxIdleInterval 0xffff #define bTxIdleInterval 0xffff
#define bOFDMService 0xffff0000 #define bOFDMService 0xffff0000
#define bTxMACHeader 0xffffffff #define bTxMACHeader 0xffffffff
#define bTxDataInit 0xff #define bTxDataInit 0xff
#define bTxHTMode 0x100 #define bTxHTMode 0x100
#define bTxDataType 0x30000 #define bTxDataType 0x30000
#define bTxRandomSeed 0xffffffff #define bTxRandomSeed 0xffffffff
#define bCCKTxPreamble 0x1 #define bCCKTxPreamble 0x1
#define bCCKTxSFD 0xffff0000 #define bCCKTxSFD 0xffff0000
#define bCCKTxSIG 0xff #define bCCKTxSIG 0xff
#define bCCKTxService 0xff00 #define bCCKTxService 0xff00
#define bCCKLengthExt 0x8000 #define bCCKLengthExt 0x8000
#define bCCKTxLength 0xffff0000 #define bCCKTxLength 0xffff0000
#define bCCKTxCRC16 0xffff #define bCCKTxCRC16 0xffff
#define bCCKTxStatus 0x1 #define bCCKTxStatus 0x1
#define bOFDMTxStatus 0x2 #define bOFDMTxStatus 0x2
//page-8 /* Page 8 */
#define bRFMOD 0x1 #define bRFMOD 0x1
#define bJapanMode 0x2 #define bJapanMode 0x2
#define bCCKTxSC 0x30 #define bCCKTxSC 0x30
#define bCCKEn 0x1000000 #define bCCKEn 0x1000000
#define bOFDMEn 0x2000000 #define bOFDMEn 0x2000000
#define bOFDMRxADCPhase 0x10000 #define bOFDMRxADCPhase 0x10000
#define bOFDMTxDACPhase 0x40000 #define bOFDMTxDACPhase 0x40000
#define bXATxAGC 0x3f #define bXATxAGC 0x3f
#define bXBTxAGC 0xf00 #define bXBTxAGC 0xf00
#define bXCTxAGC 0xf000 #define bXCTxAGC 0xf000
#define bXDTxAGC 0xf0000 #define bXDTxAGC 0xf0000
#define bPAStart 0xf0000000 #define bPAStart 0xf0000000
#define bTRStart 0x00f00000 #define bTRStart 0x00f00000
#define bRFStart 0x0000f000 #define bRFStart 0x0000f000
#define bBBStart 0x000000f0 #define bBBStart 0x000000f0
#define bBBCCKStart 0x0000000f #define bBBCCKStart 0x0000000f
#define bPAEnd 0xf //Reg0x814 /* Reg)x814 */
#define bTREnd 0x0f000000 #define bPAEnd 0xf
#define bRFEnd 0x000f0000 #define bTREnd 0x0f000000
#define bCCAMask 0x000000f0 //T2R #define bRFEnd 0x000f0000
#define bR2RCCAMask 0x00000f00 /* T2R */
#define bHSSI_R2TDelay 0xf8000000 #define bCCAMask 0x000000f0
#define bHSSI_T2RDelay 0xf80000 #define bR2RCCAMask 0x00000f00
#define bContTxHSSI 0x400 //channel gain at continue Tx #define bHSSI_R2TDelay 0xf8000000
#define bIGFromCCK 0x200 #define bHSSI_T2RDelay 0xf80000
#define bAGCAddress 0x3f /* Channel gain at continue TX. */
#define bRxHPTx 0x7000 #define bContTxHSSI 0x400
#define bRxHPT2R 0x38000 #define bIGFromCCK 0x200
#define bRxHPCCKIni 0xc0000 #define bAGCAddress 0x3f
#define bAGCTxCode 0xc00000 #define bRxHPTx 0x7000
#define bAGCRxCode 0x300000 #define bRxHPT2R 0x38000
#define b3WireDataLength 0x800 #define bRxHPCCKIni 0xc0000
#define b3WireAddressLength 0x400 #define bAGCTxCode 0xc00000
#define b3WireRFPowerDown 0x1 #define bAGCRxCode 0x300000
//#define bHWSISelect 0x8 #define b3WireDataLength 0x800
#define b5GPAPEPolarity 0x40000000 #define b3WireAddressLength 0x400
#define b2GPAPEPolarity 0x80000000 #define b3WireRFPowerDown 0x1
#define bRFSW_TxDefaultAnt 0x3 /*#define bHWSISelect 0x8 */
#define bRFSW_TxOptionAnt 0x30 #define b5GPAPEPolarity 0x40000000
#define bRFSW_RxDefaultAnt 0x300 #define b2GPAPEPolarity 0x80000000
#define bRFSW_RxOptionAnt 0x3000 #define bRFSW_TxDefaultAnt 0x3
#define bRFSI_3WireData 0x1 #define bRFSW_TxOptionAnt 0x30
#define bRFSI_3WireClock 0x2 #define bRFSW_RxDefaultAnt 0x300
#define bRFSI_3WireLoad 0x4 #define bRFSW_RxOptionAnt 0x3000
#define bRFSI_3WireRW 0x8 #define bRFSI_3WireData 0x1
#define bRFSI_3Wire 0xf //3-wire total control #define bRFSI_3WireClock 0x2
#define bRFSI_RFENV 0x10 #define bRFSI_3WireLoad 0x4
#define bRFSI_TRSW 0x20 #define bRFSI_3WireRW 0x8
#define bRFSI_TRSWB 0x40 /* 3-wire total control */
#define bRFSI_ANTSW 0x100 #define bRFSI_3Wire 0xf
#define bRFSI_ANTSWB 0x200 #define bRFSI_RFENV 0x10
#define bRFSI_PAPE 0x400 #define bRFSI_TRSW 0x20
#define bRFSI_PAPE5G 0x800 #define bRFSI_TRSWB 0x40
#define bBandSelect 0x1 #define bRFSI_ANTSW 0x100
#define bHTSIG2_GI 0x80 #define bRFSI_ANTSWB 0x200
#define bHTSIG2_Smoothing 0x01 #define bRFSI_PAPE 0x400
#define bHTSIG2_Sounding 0x02 #define bRFSI_PAPE5G 0x800
#define bHTSIG2_Aggreaton 0x08 #define bBandSelect 0x1
#define bHTSIG2_STBC 0x30 #define bHTSIG2_GI 0x80
#define bHTSIG2_AdvCoding 0x40 #define bHTSIG2_Smoothing 0x01
#define bHTSIG2_Sounding 0x02
#define bHTSIG2_Aggreaton 0x08
#define bHTSIG2_STBC 0x30
#define bHTSIG2_AdvCoding 0x40
#define bHTSIG2_NumOfHTLTF 0x300 #define bHTSIG2_NumOfHTLTF 0x300
#define bHTSIG2_CRC8 0x3fc #define bHTSIG2_CRC8 0x3fc
#define bHTSIG1_MCS 0x7f #define bHTSIG1_MCS 0x7f
#define bHTSIG1_BandWidth 0x80 #define bHTSIG1_BandWidth 0x80
#define bHTSIG1_HTLength 0xffff #define bHTSIG1_HTLength 0xffff
#define bLSIG_Rate 0xf #define bLSIG_Rate 0xf
#define bLSIG_Reserved 0x10 #define bLSIG_Reserved 0x10
#define bLSIG_Length 0x1fffe #define bLSIG_Length 0x1fffe
#define bLSIG_Parity 0x20 #define bLSIG_Parity 0x20
#define bCCKRxPhase 0x4 #define bCCKRxPhase 0x4
#define bLSSIReadAddress 0x3f000000 //LSSI "Read" Address /* LSSI "read" address */
#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal #define bLSSIReadAddress 0x3f000000
#define bLSSIReadBackData 0xfff /* LSSI "read" edge signal */
#define bLSSIReadOKFlag 0x1000 #define bLSSIReadEdge 0x80000000
#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz #define bLSSIReadBackData 0xfff
#define bLSSIReadOKFlag 0x1000
#define bRegulator0Standby 0x1 /* 0: 44 MHz, 1: 88MHz */
#define bRegulatorPLLStandby 0x2 #define bCCKSampleRate 0x8
#define bRegulator1Standby 0x4
#define bPLLPowerUp 0x8 #define bRegulator0Standby 0x1
#define bDPLLPowerUp 0x10 #define bRegulatorPLLStandby 0x2
#define bDA10PowerUp 0x20 #define bRegulator1Standby 0x4
#define bAD7PowerUp 0x200 #define bPLLPowerUp 0x8
#define bDA6PowerUp 0x2000 #define bDPLLPowerUp 0x10
#define bXtalPowerUp 0x4000 #define bDA10PowerUp 0x20
#define b40MDClkPowerUP 0x8000 #define bAD7PowerUp 0x200
#define bDA6DebugMode 0x20000 #define bDA6PowerUp 0x2000
#define bDA6Swing 0x380000 #define bXtalPowerUp 0x4000
#define bADClkPhase 0x4000000 #define b40MDClkPowerUP 0x8000
#define b80MClkDelay 0x18000000 #define bDA6DebugMode 0x20000
#define bAFEWatchDogEnable 0x20000000 #define bDA6Swing 0x380000
#define bXtalCap 0x0f000000 #define bADClkPhase 0x4000000
#define bXtalCap01 0xc0000000 #define b80MClkDelay 0x18000000
#define bXtalCap23 0x3 #define bAFEWatchDogEnable 0x20000000
#define bXtalCap92x 0x0f000000 #define bXtalCap 0x0f000000
#define bIntDifClkEnable 0x400 #define bXtalCap01 0xc0000000
#define bExtSigClkEnable 0x800 #define bXtalCap23 0x3
#define bXtalCap92x 0x0f000000
#define bIntDifClkEnable 0x400
#define bExtSigClkEnable 0x800
#define bBandgapMbiasPowerUp 0x10000 #define bBandgapMbiasPowerUp 0x10000
#define bAD11SHGain 0xc0000 #define bAD11SHGain 0xc0000
#define bAD11InputRange 0x700000 #define bAD11InputRange 0x700000
#define bAD11OPCurrent 0x3800000 #define bAD11OPCurrent 0x3800000
#define bIPathLoopback 0x4000000 #define bIPathLoopback 0x4000000
#define bQPathLoopback 0x8000000 #define bQPathLoopback 0x8000000
#define bAFELoopback 0x10000000 #define bAFELoopback 0x10000000
#define bDA10Swing 0x7e0 #define bDA10Swing 0x7e0
#define bDA10Reverse 0x800 #define bDA10Reverse 0x800
#define bDAClkSource 0x1000 #define bDAClkSource 0x1000
#define bAD7InputRange 0x6000 #define bAD7InputRange 0x6000
#define bAD7Gain 0x38000 #define bAD7Gain 0x38000
#define bAD7OutputCMMode 0x40000 #define bAD7OutputCMMode 0x40000
#define bAD7InputCMMode 0x380000 #define bAD7InputCMMode 0x380000
#define bAD7Current 0xc00000 #define bAD7Current 0xc00000
#define bRegulatorAdjust 0x7000000 #define bRegulatorAdjust 0x7000000
#define bAD11PowerUpAtTx 0x1 #define bAD11PowerUpAtTx 0x1
#define bDA10PSAtTx 0x10 #define bDA10PSAtTx 0x10
#define bAD11PowerUpAtRx 0x100 #define bAD11PowerUpAtRx 0x100
#define bDA10PSAtRx 0x1000 #define bDA10PSAtRx 0x1000
#define bCCKRxAGCFormat 0x200 #define bCCKRxAGCFormat 0x200
#define bPSDFFTSamplepPoint 0xc000 #define bPSDFFTSamplepPoint 0xc000
#define bPSDAverageNum 0x3000 #define bPSDAverageNum 0x3000
#define bIQPathControl 0xc00 #define bIQPathControl 0xc00
#define bPSDFreq 0x3ff #define bPSDFreq 0x3ff
#define bPSDAntennaPath 0x30 #define bPSDAntennaPath 0x30
#define bPSDIQSwitch 0x40 #define bPSDIQSwitch 0x40
#define bPSDRxTrigger 0x400000 #define bPSDRxTrigger 0x400000
#define bPSDTxTrigger 0x80000000 #define bPSDTxTrigger 0x80000000
#define bPSDSineToneScale 0x7f000000 #define bPSDSineToneScale 0x7f000000
#define bPSDReport 0xffff #define bPSDReport 0xffff
//page-9 /* Page 8 */
#define bOFDMTxSC 0x30000000 #define bOFDMTxSC 0x30000000
#define bCCKTxOn 0x1 #define bCCKTxOn 0x1
#define bOFDMTxOn 0x2 #define bOFDMTxOn 0x2
#define bDebugPage 0xfff //reset debug page and also HWord, LWord /* Reset debug page and also HWord, LWord */
#define bDebugItem 0xff //reset debug page and LWord #define bDebugPage 0xfff
#define bAntL 0x10 /* Reset debug page and LWord */
#define bAntNonHT 0x100 #define bDebugItem 0xff
#define bAntHT1 0x1000 #define bAntL 0x10
#define bAntHT2 0x10000 #define bAntNonHT 0x100
#define bAntHT1S1 0x100000 #define bAntHT1 0x1000
#define bAntNonHTS1 0x1000000 #define bAntHT2 0x10000
#define bAntHT1S1 0x100000
//page-a #define bAntNonHTS1 0x1000000
#define bCCKBBMode 0x3
#define bCCKTxPowerSaving 0x80 /* Page a */
#define bCCKRxPowerSaving 0x40 #define bCCKBBMode 0x3
#define bCCKSideBand 0x10 #define bCCKTxPowerSaving 0x80
#define bCCKScramble 0x8 #define bCCKRxPowerSaving 0x40
#define bCCKAntDiversity 0x8000 #define bCCKSideBand 0x10
#define bCCKScramble 0x8
#define bCCKAntDiversity 0x8000
#define bCCKCarrierRecovery 0x4000 #define bCCKCarrierRecovery 0x4000
#define bCCKTxRate 0x3000 #define bCCKTxRate 0x3000
#define bCCKDCCancel 0x0800 #define bCCKDCCancel 0x0800
#define bCCKISICancel 0x0400 #define bCCKISICancel 0x0400
#define bCCKMatchFilter 0x0200 #define bCCKMatchFilter 0x0200
#define bCCKEqualizer 0x0100 #define bCCKEqualizer 0x0100
#define bCCKPreambleDetect 0x800000 #define bCCKPreambleDetect 0x800000
#define bCCKFastFalseCCA 0x400000 #define bCCKFastFalseCCA 0x400000
#define bCCKChEstStart 0x300000 #define bCCKChEstStart 0x300000
#define bCCKCCACount 0x080000 #define bCCKCCACount 0x080000
#define bCCKcs_lim 0x070000 #define bCCKcs_lim 0x070000
#define bCCKBistMode 0x80000000 #define bCCKBistMode 0x80000000
#define bCCKCCAMask 0x40000000 #define bCCKCCAMask 0x40000000
#define bCCKTxDACPhase 0x4 #define bCCKTxDACPhase 0x4
#define bCCKRxADCPhase 0x20000000 //r_rx_clk /* r_rx_clk */
#define bCCKRxADCPhase 0x20000000
#define bCCKr_cp_mode0 0x0100 #define bCCKr_cp_mode0 0x0100
#define bCCKTxDCOffset 0xf0 #define bCCKTxDCOffset 0xf0
#define bCCKRxDCOffset 0xf #define bCCKRxDCOffset 0xf
#define bCCKCCAMode 0xc000 #define bCCKCCAMode 0xc000
#define bCCKFalseCS_lim 0x3f00 #define bCCKFalseCS_lim 0x3f00
#define bCCKCS_ratio 0xc00000 #define bCCKCS_ratio 0xc00000
#define bCCKCorgBit_sel 0x300000 #define bCCKCorgBit_sel 0x300000
#define bCCKPD_lim 0x0f0000 #define bCCKPD_lim 0x0f0000
#define bCCKNewCCA 0x80000000 #define bCCKNewCCA 0x80000000
#define bCCKRxHPofIG 0x8000 #define bCCKRxHPofIG 0x8000
#define bCCKRxIG 0x7f00 #define bCCKRxIG 0x7f00
#define bCCKLNAPolarity 0x800000 #define bCCKLNAPolarity 0x800000
#define bCCKRx1stGain 0x7f0000 #define bCCKRx1stGain 0x7f0000
#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity /* CCK Rx Initial gain polarity */
#define bCCKRxAGCSatLevel 0x1f000000 #define bCCKRFExtend 0x20000000
#define bCCKRxAGCSatCount 0xe0 #define bCCKRxAGCSatLevel 0x1f000000
#define bCCKRxRFSettle 0x1f //AGCsamp_dly #define bCCKRxAGCSatCount 0xe0
#define bCCKFixedRxAGC 0x8000 /* AGCSAmp_dly */
//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 #define bCCKRxRFSettle 0x1f
#define bCCKAntennaPolarity 0x2000 #define bCCKFixedRxAGC 0x8000
#define bCCKTxFilterType 0x0c00 /*#define bCCKRxAGCFormat 0x4000 remove to HSSI register 0x824 */
#define bCCKAntennaPolarity 0x2000
#define bCCKTxFilterType 0x0c00
#define bCCKRxAGCReportType 0x0300 #define bCCKRxAGCReportType 0x0300
#define bCCKRxDAGCEn 0x80000000 #define bCCKRxDAGCEn 0x80000000
#define bCCKRxDAGCPeriod 0x20000000 #define bCCKRxDAGCPeriod 0x20000000
#define bCCKRxDAGCSatLevel 0x1f000000 #define bCCKRxDAGCSatLevel 0x1f000000
#define bCCKTimingRecovery 0x800000 #define bCCKTimingRecovery 0x800000
#define bCCKTxC0 0x3f0000 #define bCCKTxC0 0x3f0000
#define bCCKTxC1 0x3f000000 #define bCCKTxC1 0x3f000000
#define bCCKTxC2 0x3f #define bCCKTxC2 0x3f
#define bCCKTxC3 0x3f00 #define bCCKTxC3 0x3f00
#define bCCKTxC4 0x3f0000 #define bCCKTxC4 0x3f0000
#define bCCKTxC5 0x3f000000 #define bCCKTxC5 0x3f000000
#define bCCKTxC6 0x3f #define bCCKTxC6 0x3f
#define bCCKTxC7 0x3f00 #define bCCKTxC7 0x3f00
#define bCCKDebugPort 0xff0000 #define bCCKDebugPort 0xff0000
#define bCCKDACDebug 0x0f000000 #define bCCKDACDebug 0x0f000000
#define bCCKFalseAlarmEnable 0x8000 #define bCCKFalseAlarmEnable 0x8000
#define bCCKFalseAlarmRead 0x4000 #define bCCKFalseAlarmRead 0x4000
#define bCCKTRSSI 0x7f #define bCCKTRSSI 0x7f
#define bCCKRxAGCReport 0xfe #define bCCKRxAGCReport 0xfe
#define bCCKRxReport_AntSel 0x80000000 #define bCCKRxReport_AntSel 0x80000000
#define bCCKRxReport_MFOff 0x40000000 #define bCCKRxReport_MFOff 0x40000000
#define bCCKRxRxReport_SQLoss 0x20000000 #define bCCKRxRxReport_SQLoss 0x20000000
#define bCCKRxReport_Pktloss 0x10000000 #define bCCKRxReport_Pktloss 0x10000000
#define bCCKRxReport_Lockedbit 0x08000000 #define bCCKRxReport_Lockedbit 0x08000000
#define bCCKRxReport_RateError 0x04000000 #define bCCKRxReport_RateError 0x04000000
#define bCCKRxReport_RxRate 0x03000000 #define bCCKRxReport_RxRate 0x03000000
#define bCCKRxFACounterLower 0xff #define bCCKRxFACounterLower 0xff
#define bCCKRxFACounterUpper 0xff000000 #define bCCKRxFACounterUpper 0xff000000
#define bCCKRxHPAGCStart 0xe000 #define bCCKRxHPAGCStart 0xe000
#define bCCKRxHPAGCFinal 0x1c00 #define bCCKRxHPAGCFinal 0x1c00
#define bCCKRxFalseAlarmEnable 0x8000 #define bCCKRxFalseAlarmEnable 0x8000
#define bCCKFACounterFreeze 0x4000 #define bCCKFACounterFreeze 0x4000
#define bCCKTxPathSel 0x10000000 #define bCCKTxPathSel 0x10000000
#define bCCKDefaultRxPath 0xc000000 #define bCCKDefaultRxPath 0xc000000
#define bCCKOptionRxPath 0x3000000 #define bCCKOptionRxPath 0x3000000
//page c /* Page c */
#define bNumOfSTF 0x3 #define bNumOfSTF 0x3
#define bShift_L 0xc0 #define bShift_L 0xc0
#define bGI_TH 0xc #define bGI_TH 0xc
#define bRxPathA 0x1 #define bRxPathA 0x1
#define bRxPathB 0x2 #define bRxPathB 0x2
#define bRxPathC 0x4 #define bRxPathC 0x4
#define bRxPathD 0x8 #define bRxPathD 0x8
#define bTxPathA 0x1 #define bTxPathA 0x1
#define bTxPathB 0x2 #define bTxPathB 0x2
#define bTxPathC 0x4 #define bTxPathC 0x4
#define bTxPathD 0x8 #define bTxPathD 0x8
#define bTRSSIFreq 0x200 #define bTRSSIFreq 0x200
#define bADCBackoff 0x3000 #define bADCBackoff 0x3000
#define bDFIRBackoff 0xc000 #define bDFIRBackoff 0xc000
#define bTRSSILatchPhase 0x10000 #define bTRSSILatchPhase 0x10000
#define bRxIDCOffset 0xff #define bRxIDCOffset 0xff
#define bRxQDCOffset 0xff00 #define bRxQDCOffset 0xff00
#define bRxDFIRMode 0x1800000 #define bRxDFIRMode 0x1800000
#define bRxDCNFType 0xe000000 #define bRxDCNFType 0xe000000
#define bRXIQImb_A 0x3ff #define bRXIQImb_A 0x3ff
#define bRXIQImb_B 0xfc00 #define bRXIQImb_B 0xfc00
#define bRXIQImb_C 0x3f0000 #define bRXIQImb_C 0x3f0000
#define bRXIQImb_D 0xffc00000 #define bRXIQImb_D 0xffc00000
#define bDC_dc_Notch 0x60000 #define bDC_dc_Notch 0x60000
#define bRxNBINotch 0x1f000000 #define bRxNBINotch 0x1f000000
#define bPD_TH 0xf #define bPD_TH 0xf
#define bPD_TH_Opt2 0xc000 #define bPD_TH_Opt2 0xc000
#define bPWED_TH 0x700 #define bPWED_TH 0x700
#define bIfMF_Win_L 0x800 #define bIfMF_Win_L 0x800
#define bPD_Option 0x1000 #define bPD_Option 0x1000
#define bMF_Win_L 0xe000 #define bMF_Win_L 0xe000
#define bBW_Search_L 0x30000 #define bBW_Search_L 0x30000
#define bwin_enh_L 0xc0000 #define bwin_enh_L 0xc0000
#define bBW_TH 0x700000 #define bBW_TH 0x700000
#define bED_TH2 0x3800000 #define bED_TH2 0x3800000
#define bBW_option 0x4000000 #define bBW_option 0x4000000
#define bRatio_TH 0x18000000 #define bRatio_TH 0x18000000
#define bWindow_L 0xe0000000 #define bWindow_L 0xe0000000
#define bSBD_Option 0x1 #define bSBD_Option 0x1
#define bFrame_TH 0x1c #define bFrame_TH 0x1c
#define bFS_Option 0x60 #define bFS_Option 0x60
#define bDC_Slope_check 0x80 #define bDC_Slope_check 0x80
#define bFGuard_Counter_DC_L 0xe00 #define bFGuard_Counter_DC_L 0xe00
#define bFrame_Weight_Short 0x7000 #define bFrame_Weight_Short 0x7000
#define bSub_Tune 0xe00000 #define bSub_Tune 0xe00000
#define bFrame_DC_Length 0xe000000 #define bFrame_DC_Length 0xe000000
#define bSBD_start_offset 0x30000000 #define bSBD_start_offset 0x30000000
#define bFrame_TH_2 0x7 #define bFrame_TH_2 0x7
#define bFrame_GI2_TH 0x38 #define bFrame_GI2_TH 0x38
#define bGI2_Sync_en 0x40 #define bGI2_Sync_en 0x40
#define bSarch_Short_Early 0x300 #define bSarch_Short_Early 0x300
#define bSarch_Short_Late 0xc00 #define bSarch_Short_Late 0xc00
#define bSarch_GI2_Late 0x70000 #define bSarch_GI2_Late 0x70000
#define bCFOAntSum 0x1 #define bCFOAntSum 0x1
#define bCFOAcc 0x2 #define bCFOAcc 0x2
#define bCFOStartOffset 0xc #define bCFOStartOffset 0xc
#define bCFOLookBack 0x70 #define bCFOLookBack 0x70
#define bCFOSumWeight 0x80 #define bCFOSumWeight 0x80
#define bDAGCEnable 0x10000 #define bDAGCEnable 0x10000
#define bTXIQImb_A 0x3ff #define bTXIQImb_A 0x3ff
#define bTXIQImb_B 0xfc00 #define bTXIQImb_B 0xfc00
#define bTXIQImb_C 0x3f0000 #define bTXIQImb_C 0x3f0000
#define bTXIQImb_D 0xffc00000 #define bTXIQImb_D 0xffc00000
#define bTxIDCOffset 0xff #define bTxIDCOffset 0xff
#define bTxQDCOffset 0xff00 #define bTxQDCOffset 0xff00
#define bTxDFIRMode 0x10000 #define bTxDFIRMode 0x10000
#define bTxPesudoNoiseOn 0x4000000 #define bTxPesudoNoiseOn 0x4000000
#define bTxPesudoNoise_A 0xff #define bTxPesudoNoise_A 0xff
#define bTxPesudoNoise_B 0xff00 #define bTxPesudoNoise_B 0xff00
#define bTxPesudoNoise_C 0xff0000 #define bTxPesudoNoise_C 0xff0000
#define bTxPesudoNoise_D 0xff000000 #define bTxPesudoNoise_D 0xff000000
#define bCCADropOption 0x20000 #define bCCADropOption 0x20000
#define bCCADropThres 0xfff00000 #define bCCADropThres 0xfff00000
#define bEDCCA_H 0xf #define bEDCCA_H 0xf
#define bEDCCA_L 0xf0 #define bEDCCA_L 0xf0
#define bLambda_ED 0x300 #define bLambda_ED 0x300
#define bRxInitialGain 0x7f #define bRxInitialGain 0x7f
#define bRxAntDivEn 0x80 #define bRxAntDivEn 0x80
#define bRxAGCAddressForLNA 0x7f00 #define bRxAGCAddressForLNA 0x7f00
#define bRxHighPowerFlow 0x8000 #define bRxHighPowerFlow 0x8000
#define bRxAGCFreezeThres 0xc0000 #define bRxAGCFreezeThres 0xc0000
#define bRxFreezeStep_AGC1 0x300000 #define bRxFreezeStep_AGC1 0x300000
#define bRxFreezeStep_AGC2 0xc00000 #define bRxFreezeStep_AGC2 0xc00000
#define bRxFreezeStep_AGC3 0x3000000 #define bRxFreezeStep_AGC3 0x3000000
#define bRxFreezeStep_AGC0 0xc000000 #define bRxFreezeStep_AGC0 0xc000000
#define bRxRssi_Cmp_En 0x10000000 #define bRxRssi_Cmp_En 0x10000000
#define bRxQuickAGCEn 0x20000000 #define bRxQuickAGCEn 0x20000000
#define bRxAGCFreezeThresMode 0x40000000 #define bRxAGCFreezeThresMode 0x40000000
#define bRxOverFlowCheckType 0x80000000 #define bRxOverFlowCheckType 0x80000000
#define bRxAGCShift 0x7f #define bRxAGCShift 0x7f
#define bTRSW_Tri_Only 0x80 #define bTRSW_Tri_Only 0x80
#define bPowerThres 0x300 #define bPowerThres 0x300
#define bRxAGCEn 0x1 #define bRxAGCEn 0x1
#define bRxAGCTogetherEn 0x2 #define bRxAGCTogetherEn 0x2
#define bRxAGCMin 0x4 #define bRxAGCMin 0x4
#define bRxHP_Ini 0x7 #define bRxHP_Ini 0x7
#define bRxHP_TRLNA 0x70 #define bRxHP_TRLNA 0x70
#define bRxHP_RSSI 0x700 #define bRxHP_RSSI 0x700
#define bRxHP_BBP1 0x7000 #define bRxHP_BBP1 0x7000
#define bRxHP_BBP2 0x70000 #define bRxHP_BBP2 0x70000
#define bRxHP_BBP3 0x700000 #define bRxHP_BBP3 0x700000
#define bRSSI_H 0x7f0000 //the threshold for high power /* The threshold for high power */
#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity #define bRSSI_H 0x7f0000
#define bRxSettle_TRSW 0x7 /* The threshold for ant diversity */
#define bRxSettle_LNA 0x38 #define bRSSI_Gen 0x7f000000
#define bRxSettle_RSSI 0x1c0 #define bRxSettle_TRSW 0x7
#define bRxSettle_BBP 0xe00 #define bRxSettle_LNA 0x38
#define bRxSettle_RxHP 0x7000 #define bRxSettle_RSSI 0x1c0
#define bRxSettle_AntSW_RSSI 0x38000 #define bRxSettle_BBP 0xe00
#define bRxSettle_AntSW 0xc0000 #define bRxSettle_RxHP 0x7000
#define bRxProcessTime_DAGC 0x300000 #define bRxSettle_AntSW_RSSI 0x38000
#define bRxSettle_HSSI 0x400000 #define bRxSettle_AntSW 0xc0000
#define bRxProcessTime_BBPPW 0x800000 #define bRxProcessTime_DAGC 0x300000
#define bRxAntennaPowerShift 0x3000000 #define bRxSettle_HSSI 0x400000
#define bRSSITableSelect 0xc000000 #define bRxProcessTime_BBPPW 0x800000
#define bRxHP_Final 0x7000000 #define bRxAntennaPowerShift 0x3000000
#define bRxHTSettle_BBP 0x7 #define bRSSITableSelect 0xc000000
#define bRxHTSettle_HSSI 0x8 #define bRxHP_Final 0x7000000
#define bRxHTSettle_RxHP 0x70 #define bRxHTSettle_BBP 0x7
#define bRxHTSettle_BBPPW 0x80 #define bRxHTSettle_HSSI 0x8
#define bRxHTSettle_Idle 0x300 #define bRxHTSettle_RxHP 0x70
#define bRxHTSettle_Reserved 0x1c00 #define bRxHTSettle_BBPPW 0x80
#define bRxHTRxHPEn 0x8000 #define bRxHTSettle_Idle 0x300
#define bRxHTAGCFreezeThres 0x30000 #define bRxHTSettle_Reserved 0x1c00
#define bRxHTAGCTogetherEn 0x40000 #define bRxHTRxHPEn 0x8000
#define bRxHTAGCMin 0x80000 #define bRxHTAGCFreezeThres 0x30000
#define bRxHTAGCEn 0x100000 #define bRxHTAGCTogetherEn 0x40000
#define bRxHTDAGCEn 0x200000 #define bRxHTAGCMin 0x80000
#define bRxHTRxHP_BBP 0x1c00000 #define bRxHTAGCEn 0x100000
#define bRxHTRxHP_Final 0xe0000000 #define bRxHTDAGCEn 0x200000
#define bRxPWRatioTH 0x3 #define bRxHTRxHP_BBP 0x1c00000
#define bRxPWRatioEn 0x4 #define bRxHTRxHP_Final 0xe0000000
#define bRxMFHold 0x3800 #define bRxPWRatioTH 0x3
#define bRxPD_Delay_TH1 0x38 #define bRxPWRatioEn 0x4
#define bRxPD_Delay_TH2 0x1c0 #define bRxMFHold 0x3800
#define bRxPD_DC_COUNT_MAX 0x600 #define bRxPD_Delay_TH1 0x38
//#define bRxMF_Hold 0x3800 #define bRxPD_Delay_TH2 0x1c0
#define bRxPD_DC_COUNT_MAX 0x600
/*#define bRxMF_Hold 0x3800*/
#define bRxPD_Delay_TH 0x8000 #define bRxPD_Delay_TH 0x8000
#define bRxProcess_Delay 0xf0000 #define bRxProcess_Delay 0xf0000
#define bRxSearchrange_GI2_Early 0x700000 #define bRxSearchrange_GI2_Early 0x700000
...@@ -661,7 +692,7 @@ ...@@ -661,7 +692,7 @@
#define bExtLNAGain 0x7c00 #define bExtLNAGain 0x7c00
//page d /* Page d */
#define bSTBCEn 0x4 #define bSTBCEn 0x4
#define bAntennaMapping 0x10 #define bAntennaMapping 0x10
#define bNss 0x20 #define bNss 0x20
...@@ -671,12 +702,12 @@ ...@@ -671,12 +702,12 @@
#define bOFDMContinueTx 0x10000000 #define bOFDMContinueTx 0x10000000
#define bOFDMSingleCarrier 0x20000000 #define bOFDMSingleCarrier 0x20000000
#define bOFDMSingleTone 0x40000000 #define bOFDMSingleTone 0x40000000
//#define bRxPath1 0x01 /*#define bRxPath1 0x01
//#define bRxPath2 0x02 #define bRxPath2 0x02
//#define bRxPath3 0x04 #define bRxPath3 0x04
//#define bRxPath4 0x08 #define bRxPath4 0x08
//#define bTxPath1 0x10 #define bTxPath1 0x10
//#define bTxPath2 0x20 #define bTxPath2 0x20*/
#define bHTDetect 0x100 #define bHTDetect 0x100
#define bCFOEn 0x10000 #define bCFOEn 0x10000
#define bCFOValue 0xfff00000 #define bCFOValue 0xfff00000
...@@ -689,8 +720,10 @@ ...@@ -689,8 +720,10 @@
#define bCounter_MCSNoSupport 0xffff #define bCounter_MCSNoSupport 0xffff
#define bCounter_FastSync 0xffff #define bCounter_FastSync 0xffff
#define bShortCFO 0xfff #define bShortCFO 0xfff
#define bShortCFOTLength 12 //total /* total */
#define bShortCFOFLength 11 //fraction #define bShortCFOTLength 12
/* fraction */
#define bShortCFOFLength 11
#define bLongCFO 0x7ff #define bLongCFO 0x7ff
#define bLongCFOTLength 11 #define bLongCFOTLength 11
#define bLongCFOFLength 11 #define bLongCFOFLength 11
...@@ -767,18 +800,18 @@ ...@@ -767,18 +800,18 @@
#define bUChCfg 0x7000000 #define bUChCfg 0x7000000
#define bUpdEqz 0x8000000 #define bUpdEqz 0x8000000
//page e /* Page e */
#define bTxAGCRate18_06 0x7f7f7f7f #define bTxAGCRate18_06 0x7f7f7f7f
#define bTxAGCRate54_24 0x7f7f7f7f #define bTxAGCRate54_24 0x7f7f7f7f
#define bTxAGCRateMCS32 0x7f #define bTxAGCRateMCS32 0x7f
#define bTxAGCRateCCK 0x7f00 #define bTxAGCRateCCK 0x7f00
#define bTxAGCRateMCS3_MCS0 0x7f7f7f7f #define bTxAGCRateMCS3_MCS0 0x7f7f7f7f
#define bTxAGCRateMCS7_MCS4 0x7f7f7f7f #define bTxAGCRateMCS7_MCS4 0x7f7f7f7f
#define bTxAGCRateMCS11_MCS8 0x7f7f7f7f #define bTxAGCRateMCS11_MCS8 0x7f7f7f7f
#define bTxAGCRateMCS15_MCS12 0x7f7f7f7f #define bTxAGCRateMCS15_MCS12 0x7f7f7f7f
//Rx Pseduo noise /* Rx Pseduo noise */
#define bRxPesudoNoiseOn 0x20000000 #define bRxPesudoNoiseOn 0x20000000
#define bRxPesudoNoise_A 0xff #define bRxPesudoNoise_A 0xff
#define bRxPesudoNoise_B 0xff00 #define bRxPesudoNoise_B 0xff00
...@@ -789,8 +822,7 @@ ...@@ -789,8 +822,7 @@
#define bPesudoNoiseState_C 0xffff #define bPesudoNoiseState_C 0xffff
#define bPesudoNoiseState_D 0xffff0000 #define bPesudoNoiseState_D 0xffff0000
//RF /* RF Zebra 1 */
//Zebra1
#define bZebra1_HSSIEnable 0x8 #define bZebra1_HSSIEnable 0x8
#define bZebra1_TRxControl 0xc00 #define bZebra1_TRxControl 0xc00
#define bZebra1_TRxGainSetting 0x07f #define bZebra1_TRxGainSetting 0x07f
...@@ -801,7 +833,7 @@ ...@@ -801,7 +833,7 @@
#define bZebra1_TxLPFBW 0x400 #define bZebra1_TxLPFBW 0x400
#define bZebra1_RxLPFBW 0x600 #define bZebra1_RxLPFBW 0x600
//Zebra4 /* Zebra4 */
#define bRTL8256RegModeCtrl1 0x100 #define bRTL8256RegModeCtrl1 0x100
#define bRTL8256RegModeCtrl0 0x40 #define bRTL8256RegModeCtrl0 0x40
#define bRTL8256_TxLPFBW 0x18 #define bRTL8256_TxLPFBW 0x18
...@@ -812,7 +844,7 @@ ...@@ -812,7 +844,7 @@
#define bRTL8258_RxLPFBW 0xc00 #define bRTL8258_RxLPFBW 0xc00
#define bRTL8258_RSSILPFBW 0xc0 #define bRTL8258_RSSILPFBW 0xc0
//byte endable for sb_write /* byte endable for sb_write */
#define bByte0 0x1 #define bByte0 0x1
#define bByte1 0x2 #define bByte1 0x2
#define bByte2 0x4 #define bByte2 0x4
...@@ -821,7 +853,7 @@ ...@@ -821,7 +853,7 @@
#define bWord1 0xc #define bWord1 0xc
#define bDWord 0xf #define bDWord 0xf
//for PutRegsetting & GetRegSetting BitMask /* for PutRegsetting & GetRegSetting BitMask */
#define bMaskByte0 0xff #define bMaskByte0 0xff
#define bMaskByte1 0xff00 #define bMaskByte1 0xff00
#define bMaskByte2 0xff0000 #define bMaskByte2 0xff0000
...@@ -830,7 +862,7 @@ ...@@ -830,7 +862,7 @@
#define bMaskLWord 0x0000ffff #define bMaskLWord 0x0000ffff
#define bMaskDWord 0xffffffff #define bMaskDWord 0xffffffff
//for PutRFRegsetting & GetRFRegSetting BitMask /* for PutRFRegsetting & GetRFRegSetting BitMask */
#define bMask12Bits 0xfff #define bMask12Bits 0xfff
#define bEnable 0x1 #define bEnable 0x1
...@@ -839,14 +871,16 @@ ...@@ -839,14 +871,16 @@
#define LeftAntenna 0x0 #define LeftAntenna 0x0
#define RightAntenna 0x1 #define RightAntenna 0x1
#define tCheckTxStatus 500 //500ms /* 500 ms */
#define tUpdateRxCounter 100 //100ms #define tCheckTxStatus 500
/* 100 ms */
#define tUpdateRxCounter 100
#define rateCCK 0 #define rateCCK 0
#define rateOFDM 1 #define rateOFDM 1
#define rateHT 2 #define rateHT 2
//define Register-End /* define Register-End */
#define bPMAC_End 0x1ff #define bPMAC_End 0x1ff
#define bFPGAPHY0_End 0x8ff #define bFPGAPHY0_End 0x8ff
#define bFPGAPHY1_End 0x9ff #define bFPGAPHY1_End 0x9ff
...@@ -854,12 +888,12 @@ ...@@ -854,12 +888,12 @@
#define bOFDMPHY0_End 0xcff #define bOFDMPHY0_End 0xcff
#define bOFDMPHY1_End 0xdff #define bOFDMPHY1_End 0xdff
//define max debug item in each debug page /*#define max debug item in each debug page
//#define bMaxItem_FPGA_PHY0 0x9 #define bMaxItem_FPGA_PHY0 0x9
//#define bMaxItem_FPGA_PHY1 0x3 #define bMaxItem_FPGA_PHY1 0x3
//#define bMaxItem_PHY_11B 0x16 #define bMaxItem_PHY_11B 0x16
//#define bMaxItem_OFDM_PHY0 0x29 #define bMaxItem_OFDM_PHY0 0x29
//#define bMaxItem_OFDM_PHY1 0x0 #define bMaxItem_OFDM_PHY1 0x0 */
#define bPMACControl 0x0 #define bPMACControl 0x0
#define bWMACControl 0x1 #define bWMACControl 0x1
...@@ -870,12 +904,12 @@ ...@@ -870,12 +904,12 @@
#define PathC 0x2 #define PathC 0x2
#define PathD 0x3 #define PathD 0x3
#define rRTL8256RxMixerPole 0xb #define rRTL8256RxMixerPole 0xb
#define bZebraRxMixerPole 0x6 #define bZebraRxMixerPole 0x6
#define rRTL8256TxBBOPBias 0x9 #define rRTL8256TxBBOPBias 0x9
#define bRTL8256TxBBOPBias 0x400 #define bRTL8256TxBBOPBias 0x400
#define rRTL8256TxBBBW 19 #define rRTL8256TxBBBW 19
#define bRTL8256TxBBBW 0x18 #define bRTL8256TxBBBW 0x18
#endif //__INC_HAL8190PCIPHYREG_H #endif /* __INC_HAL8190PCIPHYREG_H */
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