Merge tag 'for-3.7' of git://openrisc.net/jonas/linux

Pull OpenRISC updates from Jonas Bonn:
 "Fixups for some corner cases, build issues, and some obvious bugs in
  IRQ handling.  No major changes."

* tag 'for-3.7' of git://openrisc.net/jonas/linux:
  openrisc: mask interrupts in irq_mask_ack function
  openrisc: fix typos in comments and warnings
  openrisc: PIC should act on domain-local irqs
  openrisc: Make cpu_relax() invoke barrier()
  audit: define AUDIT_ARCH_OPENRISC
  openrisc: delay: fix handling of counter overflow
  openrisc: delay: fix loops calculation for __const_udelay

arch/openrisc/include/asm/processor.h

@@ -103,7 +103,7 @@ extern unsigned long thread_saved_pc(struct task_struct *t);
 
 #define init_stack      (init_thread_union.stack)
 
-#define cpu_relax()     do { } while (0)
+#define cpu_relax()     barrier()
 
 #endif /* __ASSEMBLY__ */
 #endif /* __ASM_OPENRISC_PROCESSOR_H */

arch/openrisc/kernel/irq.c

@@ -46,19 +46,19 @@ EXPORT_SYMBOL(arch_local_irq_restore);
 
 static void or1k_pic_mask(struct irq_data *data)
 {
-	mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->irq));
+	mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->hwirq));
 }
 
 static void or1k_pic_unmask(struct irq_data *data)
 {
-	mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (1UL << data->irq));
+	mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (1UL << data->hwirq));
 }
 
 static void or1k_pic_ack(struct irq_data *data)
 {
 	/* EDGE-triggered interrupts need to be ack'ed in order to clear
 	 * the latch.
-	 * LEVER-triggered interrupts do not need to be ack'ed; however,
+	 * LEVEL-triggered interrupts do not need to be ack'ed; however,
 	 * ack'ing the interrupt has no ill-effect and is quicker than
 	 * trying to figure out what type it is...
 	 */
@@ -75,10 +75,10 @@ static void or1k_pic_ack(struct irq_data *data)
 	 *     as opposed to a 1 as mandated by the spec
 	 */
 
-	mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->irq));
+	mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->hwirq));
 #else
-	WARN(1, "Interrupt handling possibily broken\n");
-	mtspr(SPR_PICSR, (1UL << irq));
+	WARN(1, "Interrupt handling possibly broken\n");
+	mtspr(SPR_PICSR, (1UL << data->hwirq));
 #endif
 }
 
@@ -87,10 +87,12 @@ static void or1k_pic_mask_ack(struct irq_data *data)
 	/* Comments for pic_ack apply here, too */
 
 #ifdef CONFIG_OR1K_1200
-	mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->irq));
+	mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->hwirq));
+	mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->hwirq));
 #else
-	WARN(1, "Interrupt handling possibily broken\n");
-	mtspr(SPR_PICSR, (1UL << irq));
+	WARN(1, "Interrupt handling possibly broken\n");
+	mtspr(SPR_PICMR, (1UL << data->hwirq));
+	mtspr(SPR_PICSR, (1UL << data->hwirq));
 #endif
 }
 

arch/openrisc/kernel/ptrace.c

@@ -187,7 +187,7 @@ asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
 		 */
 		ret = -1L;
 
-	audit_syscall_entry(audit_arch(), regs->gpr[11],
+	audit_syscall_entry(AUDIT_ARCH_OPENRISC, regs->gpr[11],
 			    regs->gpr[3], regs->gpr[4],
 			    regs->gpr[5], regs->gpr[6]);
 

arch/openrisc/lib/delay.c

@@ -30,9 +30,9 @@ int __devinit read_current_timer(unsigned long *timer_value)
 
 void __delay(unsigned long cycles)
 {
-	cycles_t target = get_cycles() + cycles;
+	cycles_t start = get_cycles();
 
-	while (get_cycles() < target)
+	while ((get_cycles() - start) < cycles)
 		cpu_relax();
 }
 EXPORT_SYMBOL(__delay);
@@ -41,7 +41,7 @@ inline void __const_udelay(unsigned long xloops)
 {
 	unsigned long long loops;
 
-	loops = xloops * loops_per_jiffy * HZ;
+	loops = (unsigned long long)xloops * loops_per_jiffy * HZ;
 
 	__delay(loops >> 32);
 }

include/linux/audit.h

@@ -337,6 +337,7 @@ enum {
 #define AUDIT_ARCH_MIPSEL	(EM_MIPS|__AUDIT_ARCH_LE)
 #define AUDIT_ARCH_MIPS64	(EM_MIPS|__AUDIT_ARCH_64BIT)
 #define AUDIT_ARCH_MIPSEL64	(EM_MIPS|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
+#define AUDIT_ARCH_OPENRISC	(EM_OPENRISC)
 #define AUDIT_ARCH_PARISC	(EM_PARISC)
 #define AUDIT_ARCH_PARISC64	(EM_PARISC|__AUDIT_ARCH_64BIT)
 #define AUDIT_ARCH_PPC		(EM_PPC)