ARM: dts: imx27-phytec-phycore-som: Fix active level for FEC reset

FEC reset GPIO is active low. Fix this typo.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi

@@ -182,7 +182,7 @@ pwgt1spi_reg: pwgt1spi {
 
 &fec {
 	phy-mode = "mii";
-	phy-reset-gpios = <&gpio3 30 GPIO_ACTIVE_HIGH>;
+	phy-reset-gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
 	phy-supply = <&reg_3v3>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_fec1>;