Commit 1c881b5a authored by Tero Kristo's avatar Tero Kristo

clk: ti: omap4: add clkctrl clock data

Add data for omap4 clkctrl clocks, and register it within the clkctrl
driver.
Signed-off-by: default avatarTero Kristo <t-kristo@ti.com>
Acked-by: default avatarTony Lindgren <tony@atomide.com>
parent 70ab980f
This diff is collapsed.
...@@ -415,6 +415,11 @@ static void __init _ti_omap4_clkctrl_setup(struct device_node *node) ...@@ -415,6 +415,11 @@ static void __init _ti_omap4_clkctrl_setup(struct device_node *node)
addrp = of_get_address(node, 0, NULL, NULL); addrp = of_get_address(node, 0, NULL, NULL);
addr = (u32)of_translate_address(node, addrp); addr = (u32)of_translate_address(node, addrp);
#ifdef CONFIG_ARCH_OMAP4
if (of_machine_is_compatible("ti,omap4"))
data = omap4_clkctrl_data;
#endif
while (data->addr) { while (data->addr) {
if (addr == data->addr) if (addr == data->addr)
break; break;
......
...@@ -228,6 +228,8 @@ struct omap_clkctrl_data { ...@@ -228,6 +228,8 @@ struct omap_clkctrl_data {
const struct omap_clkctrl_reg_data *regs; const struct omap_clkctrl_reg_data *regs;
}; };
extern const struct omap_clkctrl_data omap4_clkctrl_data[];
#define CLKF_SW_SUP BIT(0) #define CLKF_SW_SUP BIT(0)
#define CLKF_HW_SUP BIT(1) #define CLKF_HW_SUP BIT(1)
#define CLKF_NO_IDLEST BIT(2) #define CLKF_NO_IDLEST BIT(2)
......
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