Commit 1e928fff authored by Bai Ping's avatar Bai Ping Committed by Greg Kroah-Hartman

devicetree: bindings: nvmem: Add compatible string for imx6ul

Add new compatible string for i.MX6UL SOC.
Signed-off-by: default avatarBai Ping <ping.bai@nxp.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 4aa2b480
Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings
This binding represents the on-chip eFuse OTP controller found on This binding represents the on-chip eFuse OTP controller found on
i.MX6Q/D, i.MX6DL/S, i.MX6SL, and i.MX6SX SoCs. i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX and i.MX6UL SoCs.
Required properties: Required properties:
- compatible: should be one of - compatible: should be one of
"fsl,imx6q-ocotp" (i.MX6Q/D/DL/S), "fsl,imx6q-ocotp" (i.MX6Q/D/DL/S),
"fsl,imx6sl-ocotp" (i.MX6SL), or "fsl,imx6sl-ocotp" (i.MX6SL), or
"fsl,imx6sx-ocotp" (i.MX6SX), followed by "syscon". "fsl,imx6sx-ocotp" (i.MX6SX),
"fsl,imx6ul-ocotp" (i.MX6UL),
followed by "syscon".
- reg: Should contain the register base and length. - reg: Should contain the register base and length.
- clocks: Should contain a phandle pointing to the gated peripheral clock. - clocks: Should contain a phandle pointing to the gated peripheral clock.
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