Commit 1ece355b authored by Milton Miller's avatar Milton Miller Committed by Benjamin Herrenschmidt

powerpc: Add kconfig for muxed smp ipi support

Compile the new smp ipi mux and demux code only if a platform
will make use of it.  The new config is selected as required.

The new cause_ipi smp op is only available conditionally to point out
configs where the select is required; this makes setting the op an
immediate fail instead of a deferred unresolved symbol at link.

This also creates a new config for power surge powermac upgrade support
that can be disabled in expert mode but is default on.

I also removed the depends / default y on CONFIG_XICS since it is selected
by PSERIES.
Signed-off-by: default avatarMilton Miller <miltonm@bga.com>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent 23d72bfd
...@@ -38,7 +38,9 @@ extern void cpu_die(void); ...@@ -38,7 +38,9 @@ extern void cpu_die(void);
struct smp_ops_t { struct smp_ops_t {
void (*message_pass)(int cpu, int msg); void (*message_pass)(int cpu, int msg);
#ifdef CONFIG_PPC_SMP_MUXED_IPI
void (*cause_ipi)(int cpu, unsigned long data); void (*cause_ipi)(int cpu, unsigned long data);
#endif
int (*probe)(void); int (*probe)(void);
int (*kick_cpu)(int nr); int (*kick_cpu)(int nr);
void (*setup_cpu)(int nr); void (*setup_cpu)(int nr);
......
...@@ -178,6 +178,7 @@ int smp_request_message_ipi(int virq, int msg) ...@@ -178,6 +178,7 @@ int smp_request_message_ipi(int virq, int msg)
return err; return err;
} }
#ifdef CONFIG_PPC_SMP_MUXED_IPI
struct cpu_messages { struct cpu_messages {
unsigned long messages; /* current messages bits */ unsigned long messages; /* current messages bits */
unsigned long data; /* data for cause ipi */ unsigned long data; /* data for cause ipi */
...@@ -230,6 +231,7 @@ irqreturn_t smp_ipi_demux(void) ...@@ -230,6 +231,7 @@ irqreturn_t smp_ipi_demux(void)
} }
return IRQ_HANDLED; return IRQ_HANDLED;
} }
#endif /* CONFIG_PPC_SMP_MUXED_IPI */
void smp_send_reschedule(int cpu) void smp_send_reschedule(int cpu)
{ {
......
...@@ -57,6 +57,14 @@ config UDBG_RTAS_CONSOLE ...@@ -57,6 +57,14 @@ config UDBG_RTAS_CONSOLE
depends on PPC_RTAS depends on PPC_RTAS
default n default n
config PPC_SMP_MUXED_IPI
bool
help
Select this opton if your platform supports SMP and your
interrupt controller provides less than 4 interrupts to each
cpu. This will enable the generic code to multiplex the 4
messages on to one ipi.
config PPC_UDBG_BEAT config PPC_UDBG_BEAT
bool "BEAT based debug console" bool "BEAT based debug console"
depends on PPC_CELLEB depends on PPC_CELLEB
......
...@@ -73,6 +73,7 @@ config PPC_BOOK3S_64 ...@@ -73,6 +73,7 @@ config PPC_BOOK3S_64
config PPC_BOOK3E_64 config PPC_BOOK3E_64
bool "Embedded processors" bool "Embedded processors"
select PPC_FPU # Make it a choice ? select PPC_FPU # Make it a choice ?
select PPC_SMP_MUXED_IPI
endchoice endchoice
...@@ -178,6 +179,7 @@ config FSL_BOOKE ...@@ -178,6 +179,7 @@ config FSL_BOOKE
config PPC_FSL_BOOK3E config PPC_FSL_BOOK3E
bool bool
select FSL_EMB_PERFMON select FSL_EMB_PERFMON
select PPC_SMP_MUXED_IPI
default y if FSL_BOOKE default y if FSL_BOOKE
config PTE_64BIT config PTE_64BIT
......
config PPC_ISERIES config PPC_ISERIES
bool "IBM Legacy iSeries" bool "IBM Legacy iSeries"
depends on PPC64 && PPC_BOOK3S depends on PPC64 && PPC_BOOK3S
select PPC_SMP_MUXED_IPI
select PPC_INDIRECT_PIO select PPC_INDIRECT_PIO
select PPC_INDIRECT_MMIO select PPC_INDIRECT_MMIO
select PPC_PCI_CHOICE if EXPERT select PPC_PCI_CHOICE if EXPERT
......
...@@ -18,4 +18,13 @@ config PPC_PMAC64 ...@@ -18,4 +18,13 @@ config PPC_PMAC64
select PPC_970_NAP select PPC_970_NAP
default y default y
config PPC_PMAC32_PSURGE
bool "Support for powersurge upgrade cards" if EXPERT
depends on SMP && PPC32 && PPC_PMAC
select PPC_SMP_MUXED_IPI
default y
help
The powersurge cpu boards can be used in the generation
of powermacs that have a socket for an upgradeable cpu card,
including the 7500, 8500, 9500, 9600. Support exists for
both dual and quad socket upgrade cards.
...@@ -239,7 +239,7 @@ static unsigned int pmac_pic_get_irq(void) ...@@ -239,7 +239,7 @@ static unsigned int pmac_pic_get_irq(void)
unsigned long bits = 0; unsigned long bits = 0;
unsigned long flags; unsigned long flags;
#ifdef CONFIG_SMP #ifdef CONFIG_PPC_PMAC32_PSURGE
void psurge_smp_message_recv(void); void psurge_smp_message_recv(void);
/* IPI's are a hack on the powersurge -- Cort */ /* IPI's are a hack on the powersurge -- Cort */
...@@ -247,7 +247,7 @@ static unsigned int pmac_pic_get_irq(void) ...@@ -247,7 +247,7 @@ static unsigned int pmac_pic_get_irq(void)
psurge_smp_message_recv(); psurge_smp_message_recv();
return NO_IRQ_IGNORE; /* ignore, already handled */ return NO_IRQ_IGNORE; /* ignore, already handled */
} }
#endif /* CONFIG_SMP */ #endif /* CONFIG_PPC_PMAC32_PSURGE */
raw_spin_lock_irqsave(&pmac_pic_lock, flags); raw_spin_lock_irqsave(&pmac_pic_lock, flags);
for (irq = max_real_irqs; (irq -= 32) >= 0; ) { for (irq = max_real_irqs; (irq -= 32) >= 0; ) {
int i = irq >> 5; int i = irq >> 5;
......
...@@ -70,7 +70,7 @@ static void (*pmac_tb_freeze)(int freeze); ...@@ -70,7 +70,7 @@ static void (*pmac_tb_freeze)(int freeze);
static u64 timebase; static u64 timebase;
static int tb_req; static int tb_req;
#ifdef CONFIG_PPC32 #ifdef CONFIG_PPC_PMAC32_PSURGE
/* /*
* Powersurge (old powermac SMP) support. * Powersurge (old powermac SMP) support.
...@@ -420,7 +420,7 @@ struct smp_ops_t psurge_smp_ops = { ...@@ -420,7 +420,7 @@ struct smp_ops_t psurge_smp_ops = {
.give_timebase = smp_psurge_give_timebase, .give_timebase = smp_psurge_give_timebase,
.take_timebase = smp_psurge_take_timebase, .take_timebase = smp_psurge_take_timebase,
}; };
#endif /* CONFIG_PPC32 - actually powersurge support */ #endif /* CONFIG_PPC_PMAC32_PSURGE */
/* /*
* Core 99 and later support * Core 99 and later support
...@@ -980,7 +980,7 @@ void __init pmac_setup_smp(void) ...@@ -980,7 +980,7 @@ void __init pmac_setup_smp(void)
of_node_put(np); of_node_put(np);
smp_ops = &core99_smp_ops; smp_ops = &core99_smp_ops;
} }
#ifdef CONFIG_PPC32 #ifdef CONFIG_PPC_PMAC32_PSURGE
else { else {
/* We have to set bits in cpu_possible_mask here since the /* We have to set bits in cpu_possible_mask here since the
* secondary CPU(s) aren't in the device tree. Various * secondary CPU(s) aren't in the device tree. Various
...@@ -993,7 +993,7 @@ void __init pmac_setup_smp(void) ...@@ -993,7 +993,7 @@ void __init pmac_setup_smp(void)
set_cpu_possible(cpu, true); set_cpu_possible(cpu, true);
smp_ops = &psurge_smp_ops; smp_ops = &psurge_smp_ops;
} }
#endif /* CONFIG_PPC32 */ #endif /* CONFIG_PPC_PMAC32_PSURGE */
#ifdef CONFIG_HOTPLUG_CPU #ifdef CONFIG_HOTPLUG_CPU
ppc_md.cpu_die = pmac_cpu_die; ppc_md.cpu_die = pmac_cpu_die;
......
config PPC_XICS config PPC_XICS
def_bool n def_bool n
select PPC_SMP_MUXED_IPI
config PPC_ICP_NATIVE config PPC_ICP_NATIVE
def_bool n def_bool n
......
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