[ARM] Fix IXP4XX_OST_RELOAD_MASK definition to not mask proper bits

Current definition of OST_RELOAD_MASK masks off bit 2 of
the timer reload value register when it should mask bits 0 
and 1.  This would cause small timeout values to be loaded 
incorrectly.

include/asm-arm/arch-ixp4xx/ixp4xx-regs.h

@@ -224,7 +224,7 @@
 #define IXP4XX_OST_ENABLE		0x00000001
 #define IXP4XX_OST_ONE_SHOT		0x00000002
 /* Low order bits of reload value ignored */
-#define IXP4XX_OST_RELOAD_MASK		0x00000004
+#define IXP4XX_OST_RELOAD_MASK		0x00000003
 #define IXP4XX_OST_DISABLED		0x00000000
 #define IXP4XX_OSST_TIMER_1_PEND	0x00000001
 #define IXP4XX_OSST_TIMER_2_PEND	0x00000002