Commit 24420760 authored by Andi Kleen's avatar Andi Kleen Committed by Andi Kleen

[PATCH] x86-64: Use different constraint for gcc < 4.1 in bitops.h

+m is really correct for a RMW instruction, but some older gccs
error out. I finally gave in and ifdefed it.

This fixes compilation errors with some compiler version.
Signed-off-by: default avatarAndi Kleen <ak@suse.de>
parent 343cde51
...@@ -7,7 +7,13 @@ ...@@ -7,7 +7,13 @@
#include <asm/alternative.h> #include <asm/alternative.h>
#define ADDR (*(volatile long *) addr) #if __GNUC__ < 4 || __GNUC_MINOR__ < 1
/* Technically wrong, but this avoids compilation errors on some gcc
versions. */
#define ADDR "=m" (*(volatile long *) addr)
#else
#define ADDR "+m" (*(volatile long *) addr)
#endif
/** /**
* set_bit - Atomically set a bit in memory * set_bit - Atomically set a bit in memory
...@@ -23,7 +29,7 @@ static __inline__ void set_bit(int nr, volatile void * addr) ...@@ -23,7 +29,7 @@ static __inline__ void set_bit(int nr, volatile void * addr)
{ {
__asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX
"btsl %1,%0" "btsl %1,%0"
:"+m" (ADDR) :ADDR
:"dIr" (nr) : "memory"); :"dIr" (nr) : "memory");
} }
...@@ -40,7 +46,7 @@ static __inline__ void __set_bit(int nr, volatile void * addr) ...@@ -40,7 +46,7 @@ static __inline__ void __set_bit(int nr, volatile void * addr)
{ {
__asm__ volatile( __asm__ volatile(
"btsl %1,%0" "btsl %1,%0"
:"+m" (ADDR) :ADDR
:"dIr" (nr) : "memory"); :"dIr" (nr) : "memory");
} }
...@@ -58,7 +64,7 @@ static __inline__ void clear_bit(int nr, volatile void * addr) ...@@ -58,7 +64,7 @@ static __inline__ void clear_bit(int nr, volatile void * addr)
{ {
__asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX
"btrl %1,%0" "btrl %1,%0"
:"+m" (ADDR) :ADDR
:"dIr" (nr)); :"dIr" (nr));
} }
...@@ -66,7 +72,7 @@ static __inline__ void __clear_bit(int nr, volatile void * addr) ...@@ -66,7 +72,7 @@ static __inline__ void __clear_bit(int nr, volatile void * addr)
{ {
__asm__ __volatile__( __asm__ __volatile__(
"btrl %1,%0" "btrl %1,%0"
:"+m" (ADDR) :ADDR
:"dIr" (nr)); :"dIr" (nr));
} }
...@@ -86,7 +92,7 @@ static __inline__ void __change_bit(int nr, volatile void * addr) ...@@ -86,7 +92,7 @@ static __inline__ void __change_bit(int nr, volatile void * addr)
{ {
__asm__ __volatile__( __asm__ __volatile__(
"btcl %1,%0" "btcl %1,%0"
:"+m" (ADDR) :ADDR
:"dIr" (nr)); :"dIr" (nr));
} }
...@@ -103,7 +109,7 @@ static __inline__ void change_bit(int nr, volatile void * addr) ...@@ -103,7 +109,7 @@ static __inline__ void change_bit(int nr, volatile void * addr)
{ {
__asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX
"btcl %1,%0" "btcl %1,%0"
:"+m" (ADDR) :ADDR
:"dIr" (nr)); :"dIr" (nr));
} }
...@@ -121,7 +127,7 @@ static __inline__ int test_and_set_bit(int nr, volatile void * addr) ...@@ -121,7 +127,7 @@ static __inline__ int test_and_set_bit(int nr, volatile void * addr)
__asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX
"btsl %2,%1\n\tsbbl %0,%0" "btsl %2,%1\n\tsbbl %0,%0"
:"=r" (oldbit),"+m" (ADDR) :"=r" (oldbit),ADDR
:"dIr" (nr) : "memory"); :"dIr" (nr) : "memory");
return oldbit; return oldbit;
} }
...@@ -141,7 +147,7 @@ static __inline__ int __test_and_set_bit(int nr, volatile void * addr) ...@@ -141,7 +147,7 @@ static __inline__ int __test_and_set_bit(int nr, volatile void * addr)
__asm__( __asm__(
"btsl %2,%1\n\tsbbl %0,%0" "btsl %2,%1\n\tsbbl %0,%0"
:"=r" (oldbit),"+m" (ADDR) :"=r" (oldbit),ADDR
:"dIr" (nr)); :"dIr" (nr));
return oldbit; return oldbit;
} }
...@@ -160,7 +166,7 @@ static __inline__ int test_and_clear_bit(int nr, volatile void * addr) ...@@ -160,7 +166,7 @@ static __inline__ int test_and_clear_bit(int nr, volatile void * addr)
__asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX
"btrl %2,%1\n\tsbbl %0,%0" "btrl %2,%1\n\tsbbl %0,%0"
:"=r" (oldbit),"+m" (ADDR) :"=r" (oldbit),ADDR
:"dIr" (nr) : "memory"); :"dIr" (nr) : "memory");
return oldbit; return oldbit;
} }
...@@ -180,7 +186,7 @@ static __inline__ int __test_and_clear_bit(int nr, volatile void * addr) ...@@ -180,7 +186,7 @@ static __inline__ int __test_and_clear_bit(int nr, volatile void * addr)
__asm__( __asm__(
"btrl %2,%1\n\tsbbl %0,%0" "btrl %2,%1\n\tsbbl %0,%0"
:"=r" (oldbit),"+m" (ADDR) :"=r" (oldbit),ADDR
:"dIr" (nr)); :"dIr" (nr));
return oldbit; return oldbit;
} }
...@@ -192,7 +198,7 @@ static __inline__ int __test_and_change_bit(int nr, volatile void * addr) ...@@ -192,7 +198,7 @@ static __inline__ int __test_and_change_bit(int nr, volatile void * addr)
__asm__ __volatile__( __asm__ __volatile__(
"btcl %2,%1\n\tsbbl %0,%0" "btcl %2,%1\n\tsbbl %0,%0"
:"=r" (oldbit),"+m" (ADDR) :"=r" (oldbit),ADDR
:"dIr" (nr) : "memory"); :"dIr" (nr) : "memory");
return oldbit; return oldbit;
} }
...@@ -211,7 +217,7 @@ static __inline__ int test_and_change_bit(int nr, volatile void * addr) ...@@ -211,7 +217,7 @@ static __inline__ int test_and_change_bit(int nr, volatile void * addr)
__asm__ __volatile__( LOCK_PREFIX __asm__ __volatile__( LOCK_PREFIX
"btcl %2,%1\n\tsbbl %0,%0" "btcl %2,%1\n\tsbbl %0,%0"
:"=r" (oldbit),"+m" (ADDR) :"=r" (oldbit),ADDR
:"dIr" (nr) : "memory"); :"dIr" (nr) : "memory");
return oldbit; return oldbit;
} }
...@@ -237,7 +243,7 @@ static __inline__ int variable_test_bit(int nr, volatile const void * addr) ...@@ -237,7 +243,7 @@ static __inline__ int variable_test_bit(int nr, volatile const void * addr)
__asm__ __volatile__( __asm__ __volatile__(
"btl %2,%1\n\tsbbl %0,%0" "btl %2,%1\n\tsbbl %0,%0"
:"=r" (oldbit) :"=r" (oldbit)
:"m" (ADDR),"dIr" (nr)); :"m" (*(volatile long *)addr),"dIr" (nr));
return oldbit; return oldbit;
} }
......
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