Commit 28c8c19a authored by Eran Harary's avatar Eran Harary Committed by Emmanuel Grumbach

iwlwifi: mvm: don't wait for firmware verification

The firmware has a race in the flow that indicates the
completion of the authentication. Checking the completion
of the authentication is not really needed anyway since
we can wait for the ALIVE notification instead.
Remove the unneeded and buggy code.
Signed-off-by: default avatarEran Harary <eran.harary@intel.com>
Signed-off-by: default avatarEmmanuel Grumbach <emmanuel.grumbach@intel.com>
parent bcd535eb
...@@ -295,25 +295,6 @@ ...@@ -295,25 +295,6 @@
#define OSC_CLK (0xa04068) #define OSC_CLK (0xa04068)
#define OSC_CLK_FORCE_CONTROL (0x8) #define OSC_CLK_FORCE_CONTROL (0x8)
/* SECURE boot registers */
#define LMPM_SECURE_BOOT_CONFIG_ADDR (0x100)
enum secure_boot_config_reg {
LMPM_SECURE_BOOT_CONFIG_INSPECTOR_BURNED_IN_OTP = 0x00000001,
LMPM_SECURE_BOOT_CONFIG_INSPECTOR_NOT_REQ = 0x00000002,
};
#define LMPM_SECURE_BOOT_CPU1_STATUS_ADDR_B0 (0xA01E30)
#define LMPM_SECURE_BOOT_CPU1_STATUS_ADDR (0x1E30)
#define LMPM_SECURE_BOOT_CPU2_STATUS_ADDR (0x1E34)
enum secure_boot_status_reg {
LMPM_SECURE_BOOT_CPU_STATUS_VERF_STATUS = 0x00000001,
LMPM_SECURE_BOOT_CPU_STATUS_VERF_COMPLETED = 0x00000002,
LMPM_SECURE_BOOT_CPU_STATUS_VERF_SUCCESS = 0x00000004,
LMPM_SECURE_BOOT_CPU_STATUS_VERF_FAIL = 0x00000008,
LMPM_SECURE_BOOT_CPU_STATUS_SIGN_VERF_FAIL = 0x00000010,
LMPM_SECURE_BOOT_STATUS_SUCCESS = 0x00000003,
};
#define FH_UCODE_LOAD_STATUS (0x1AF0) #define FH_UCODE_LOAD_STATUS (0x1AF0)
#define CSR_UCODE_LOAD_STATUS_ADDR (0x1E70) #define CSR_UCODE_LOAD_STATUS_ADDR (0x1E70)
enum secure_load_status_reg { enum secure_load_status_reg {
...@@ -334,8 +315,6 @@ enum secure_load_status_reg { ...@@ -334,8 +315,6 @@ enum secure_load_status_reg {
#define LMPM_SECURE_CPU1_HDR_MEM_SPACE (0x420000) #define LMPM_SECURE_CPU1_HDR_MEM_SPACE (0x420000)
#define LMPM_SECURE_CPU2_HDR_MEM_SPACE (0x420400) #define LMPM_SECURE_CPU2_HDR_MEM_SPACE (0x420400)
#define LMPM_SECURE_TIME_OUT (100) /* 10 micro */
/* Rx FIFO */ /* Rx FIFO */
#define RXF_SIZE_ADDR (0xa00c88) #define RXF_SIZE_ADDR (0xa00c88)
#define RXF_RD_D_SPACE (0xa00c40) #define RXF_RD_D_SPACE (0xa00c40)
......
...@@ -930,7 +930,6 @@ static int iwl_pcie_load_given_ucode_8000b(struct iwl_trans *trans, ...@@ -930,7 +930,6 @@ static int iwl_pcie_load_given_ucode_8000b(struct iwl_trans *trans,
{ {
int ret = 0; int ret = 0;
int first_ucode_section; int first_ucode_section;
u32 reg;
IWL_DEBUG_FW(trans, "working with %s CPU\n", IWL_DEBUG_FW(trans, "working with %s CPU\n",
image->is_dual_cpus ? "Dual" : "Single"); image->is_dual_cpus ? "Dual" : "Single");
...@@ -959,20 +958,6 @@ static int iwl_pcie_load_given_ucode_8000b(struct iwl_trans *trans, ...@@ -959,20 +958,6 @@ static int iwl_pcie_load_given_ucode_8000b(struct iwl_trans *trans,
if (ret) if (ret)
return ret; return ret;
/* wait for image verification to complete */
ret = iwl_poll_prph_bit(trans, LMPM_SECURE_BOOT_CPU1_STATUS_ADDR_B0,
LMPM_SECURE_BOOT_STATUS_SUCCESS,
LMPM_SECURE_BOOT_STATUS_SUCCESS,
LMPM_SECURE_TIME_OUT);
if (ret < 0) {
reg = iwl_read_prph(trans,
LMPM_SECURE_BOOT_CPU1_STATUS_ADDR_B0);
IWL_ERR(trans, "Timeout on secure boot process, reg = %x\n",
reg);
return ret;
}
return 0; return 0;
} }
......
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